diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/boot/compressed/head.S linux-88fxx81/arch/arm/boot/compressed/head.S --- linux-2.6.12.6-armeb/arch/arm/boot/compressed/head.S 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/boot/compressed/head.S 2006-08-30 19:27:34.000000000 +0930 @@ -635,6 +635,11 @@ 1: ldr r3, [r1], r11 @ s/w flush D cache teq r1, r2 bne 1b +#ifdef CONFIG_ARCH_MV88fxx81 + /* 4 way cache, load of new cache lines won't be enough. */ +2: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate + bne 2b +#endif mcr p15, 0, r1, c7, c5, 0 @ flush I cache mcr p15, 0, r1, c7, c6, 0 @ flush D cache diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/boot/compressed/misc.c linux-88fxx81/arch/arm/boot/compressed/misc.c --- linux-2.6.12.6-armeb/arch/arm/boot/compressed/misc.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/boot/compressed/misc.c 2006-08-28 20:03:04.000000000 +0930 @@ -18,8 +18,11 @@ unsigned int __machine_arch_type; -#include - +/*#include */ +#define NULL ((void *) 0) +#define size_t unsigned int +#define memzero(p,n) ({ if ((n) != 0) __memzero((p),(n)); (p); }) + #include #ifdef STANDALONE_DEBUG diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/boot/compressed/vmlinux.lds.in linux-88fxx81/arch/arm/boot/compressed/vmlinux.lds.in --- linux-2.6.12.6-armeb/arch/arm/boot/compressed/vmlinux.lds.in 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/boot/compressed/vmlinux.lds.in 2006-08-30 21:51:30.000000000 +0930 @@ -18,6 +18,7 @@ _start = .; *(.start) *(.text) + *(.text.*) *(.fixup) *(.gnu.warning) *(.rodata) Binary files linux-2.6.12.6-armeb/arch/arm/boot/uImage.ok and linux-88fxx81/arch/arm/boot/uImage.ok differ diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/common/rtctime.c linux-88fxx81/arch/arm/common/rtctime.c --- linux-2.6.12.6-armeb/arch/arm/common/rtctime.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/common/rtctime.c 2006-09-20 13:12:06.000000000 +0930 @@ -17,7 +17,10 @@ #include #include #include +#include #include +#include +#include #include #include @@ -34,120 +37,46 @@ /* * rtc_sem protects rtc_inuse and rtc_ops */ -static DECLARE_MUTEX(rtc_sem); +static DEFINE_MUTEX(rtc_mutex); static unsigned long rtc_inuse; static struct rtc_ops *rtc_ops; #define rtc_epoch 1900UL -static const unsigned char days_in_month[] = { - 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 -}; - -#define LEAPS_THRU_END_OF(y) ((y)/4 - (y)/100 + (y)/400) -#define LEAP_YEAR(year) ((!(year % 4) && (year % 100)) || !(year % 400)) - -static int month_days(unsigned int month, unsigned int year) -{ - return days_in_month[month] + (LEAP_YEAR(year) && month == 1); -} - -/* - * Convert seconds since 01-01-1970 00:00:00 to Gregorian date. - */ -void rtc_time_to_tm(unsigned long time, struct rtc_time *tm) -{ - int days, month, year; - - days = time / 86400; - time -= days * 86400; - - tm->tm_wday = (days + 4) % 7; - - year = 1970 + days / 365; - days -= (year - 1970) * 365 - + LEAPS_THRU_END_OF(year - 1) - - LEAPS_THRU_END_OF(1970 - 1); - if (days < 0) { - year -= 1; - days += 365 + LEAP_YEAR(year); - } - tm->tm_year = year - 1900; - tm->tm_yday = days + 1; - - for (month = 0; month < 11; month++) { - int newdays; - - newdays = days - month_days(month, year); - if (newdays < 0) - break; - days = newdays; - } - tm->tm_mon = month; - tm->tm_mday = days + 1; - - tm->tm_hour = time / 3600; - time -= tm->tm_hour * 3600; - tm->tm_min = time / 60; - tm->tm_sec = time - tm->tm_min * 60; -} -EXPORT_SYMBOL(rtc_time_to_tm); - -/* - * Does the rtc_time represent a valid date/time? - */ -int rtc_valid_tm(struct rtc_time *tm) -{ - if (tm->tm_year < 70 || - tm->tm_mon >= 12 || - tm->tm_mday < 1 || - tm->tm_mday > month_days(tm->tm_mon, tm->tm_year + 1900) || - tm->tm_hour >= 24 || - tm->tm_min >= 60 || - tm->tm_sec >= 60) - return -EINVAL; - - return 0; -} -EXPORT_SYMBOL(rtc_valid_tm); - -/* - * Convert Gregorian date to seconds since 01-01-1970 00:00:00. - */ -int rtc_tm_to_time(struct rtc_time *tm, unsigned long *time) -{ - *time = mktime(tm->tm_year + 1900, tm->tm_mon + 1, tm->tm_mday, - tm->tm_hour, tm->tm_min, tm->tm_sec); - - return 0; -} -EXPORT_SYMBOL(rtc_tm_to_time); - /* * Calculate the next alarm time given the requested alarm time mask * and the current time. - * - * FIXME: for now, we just copy the alarm time because we're lazy (and - * is therefore buggy - setting a 10am alarm at 8pm will not result in - * the alarm triggering.) */ void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, struct rtc_time *alrm) { + unsigned long next_time; + unsigned long now_time; + next->tm_year = now->tm_year; next->tm_mon = now->tm_mon; next->tm_mday = now->tm_mday; next->tm_hour = alrm->tm_hour; next->tm_min = alrm->tm_min; next->tm_sec = alrm->tm_sec; + + rtc_tm_to_time(now, &now_time); + rtc_tm_to_time(next, &next_time); + + if (next_time < now_time) { + /* Advance one day */ + next_time += 60 * 60 * 24; + rtc_time_to_tm(next_time, next); + } } +EXPORT_SYMBOL(rtc_next_alarm_time); -static inline int rtc_read_time(struct rtc_ops *ops, struct rtc_time *tm) +static inline int rtc_arm_read_time(struct rtc_ops *ops, struct rtc_time *tm) { memset(tm, 0, sizeof(struct rtc_time)); return ops->read_time(tm); } -static inline int rtc_set_time(struct rtc_ops *ops, struct rtc_time *tm) +static inline int rtc_arm_set_time(struct rtc_ops *ops, struct rtc_time *tm) { int ret; @@ -158,7 +87,7 @@ return ret; } -static inline int rtc_read_alarm(struct rtc_ops *ops, struct rtc_wkalrm *alrm) +static inline int rtc_arm_read_alarm(struct rtc_ops *ops, struct rtc_wkalrm *alrm) { int ret = -EINVAL; if (ops->read_alarm) { @@ -168,7 +97,7 @@ return ret; } -static inline int rtc_set_alarm(struct rtc_ops *ops, struct rtc_wkalrm *alrm) +static inline int rtc_arm_set_alarm(struct rtc_ops *ops, struct rtc_wkalrm *alrm) { int ret = -EINVAL; if (ops->set_alarm) @@ -256,7 +185,7 @@ switch (cmd) { case RTC_ALM_READ: - ret = rtc_read_alarm(ops, &alrm); + ret = rtc_arm_read_alarm(ops, &alrm); if (ret) break; ret = copy_to_user(uarg, &alrm.time, sizeof(tm)); @@ -278,11 +207,11 @@ alrm.time.tm_wday = -1; alrm.time.tm_yday = -1; alrm.time.tm_isdst = -1; - ret = rtc_set_alarm(ops, &alrm); + ret = rtc_arm_set_alarm(ops, &alrm); break; case RTC_RD_TIME: - ret = rtc_read_time(ops, &tm); + ret = rtc_arm_read_time(ops, &tm); if (ret) break; ret = copy_to_user(uarg, &tm, sizeof(tm)); @@ -300,7 +229,7 @@ ret = -EFAULT; break; } - ret = rtc_set_time(ops, &tm); + ret = rtc_arm_set_time(ops, &tm); break; case RTC_EPOCH_SET: @@ -331,11 +260,11 @@ ret = -EFAULT; break; } - ret = rtc_set_alarm(ops, &alrm); + ret = rtc_arm_set_alarm(ops, &alrm); break; case RTC_WKALM_RD: - ret = rtc_read_alarm(ops, &alrm); + ret = rtc_arm_read_alarm(ops, &alrm); if (ret) break; ret = copy_to_user(uarg, &alrm, sizeof(alrm)); @@ -355,7 +284,7 @@ { int ret; - down(&rtc_sem); + mutex_lock(&rtc_mutex); if (rtc_inuse) { ret = -EBUSY; @@ -373,7 +302,7 @@ rtc_inuse = 1; } } - up(&rtc_sem); + mutex_unlock(&rtc_mutex); return ret; } @@ -425,7 +354,7 @@ struct rtc_time tm; char *p = page; - if (rtc_read_time(ops, &tm) == 0) { + if (rtc_arm_read_time(ops, &tm) == 0) { p += sprintf(p, "rtc_time\t: %02d:%02d:%02d\n" "rtc_date\t: %04d-%02d-%02d\n" @@ -435,7 +364,7 @@ rtc_epoch); } - if (rtc_read_alarm(ops, &alrm) == 0) { + if (rtc_arm_read_alarm(ops, &alrm) == 0) { p += sprintf(p, "alrm_time\t: "); if ((unsigned int)alrm.time.tm_hour <= 24) p += sprintf(p, "%02d:", alrm.time.tm_hour); @@ -479,7 +408,7 @@ { int ret = -EBUSY; - down(&rtc_sem); + mutex_lock(&rtc_mutex); if (rtc_ops == NULL) { rtc_ops = ops; @@ -488,7 +417,7 @@ create_proc_read_entry("driver/rtc", 0, NULL, rtc_read_proc, ops); } - up(&rtc_sem); + mutex_unlock(&rtc_mutex); return ret; } @@ -496,12 +425,12 @@ void unregister_rtc(struct rtc_ops *rtc) { - down(&rtc_sem); + mutex_lock(&rtc_mutex); if (rtc == rtc_ops) { remove_proc_entry("driver/rtc", NULL); misc_deregister(&rtc_miscdev); rtc_ops = NULL; } - up(&rtc_sem); + mutex_unlock(&rtc_mutex); } EXPORT_SYMBOL(unregister_rtc); diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/common/rtctime.c.org linux-88fxx81/arch/arm/common/rtctime.c.org --- linux-2.6.12.6-armeb/arch/arm/common/rtctime.c.org 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/common/rtctime.c.org 2005-08-30 02:25:27.000000000 +0930 @@ -0,0 +1,507 @@ +/* + * linux/arch/arm/common/rtctime.c + * + * Copyright (C) 2003 Deep Blue Solutions Ltd. + * Based on sa1100-rtc.c, Nils Faerber, CIH, Nicolas Pitre. + * Based on rtc.c by Paul Gortmaker + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +static DECLARE_WAIT_QUEUE_HEAD(rtc_wait); +static struct fasync_struct *rtc_async_queue; + +/* + * rtc_lock protects rtc_irq_data + */ +static DEFINE_SPINLOCK(rtc_lock); +static unsigned long rtc_irq_data; + +/* + * rtc_sem protects rtc_inuse and rtc_ops + */ +static DECLARE_MUTEX(rtc_sem); +static unsigned long rtc_inuse; +static struct rtc_ops *rtc_ops; + +#define rtc_epoch 1900UL + +static const unsigned char days_in_month[] = { + 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 +}; + +#define LEAPS_THRU_END_OF(y) ((y)/4 - (y)/100 + (y)/400) +#define LEAP_YEAR(year) ((!(year % 4) && (year % 100)) || !(year % 400)) + +static int month_days(unsigned int month, unsigned int year) +{ + return days_in_month[month] + (LEAP_YEAR(year) && month == 1); +} + +/* + * Convert seconds since 01-01-1970 00:00:00 to Gregorian date. + */ +void rtc_time_to_tm(unsigned long time, struct rtc_time *tm) +{ + int days, month, year; + + days = time / 86400; + time -= days * 86400; + + tm->tm_wday = (days + 4) % 7; + + year = 1970 + days / 365; + days -= (year - 1970) * 365 + + LEAPS_THRU_END_OF(year - 1) + - LEAPS_THRU_END_OF(1970 - 1); + if (days < 0) { + year -= 1; + days += 365 + LEAP_YEAR(year); + } + tm->tm_year = year - 1900; + tm->tm_yday = days + 1; + + for (month = 0; month < 11; month++) { + int newdays; + + newdays = days - month_days(month, year); + if (newdays < 0) + break; + days = newdays; + } + tm->tm_mon = month; + tm->tm_mday = days + 1; + + tm->tm_hour = time / 3600; + time -= tm->tm_hour * 3600; + tm->tm_min = time / 60; + tm->tm_sec = time - tm->tm_min * 60; +} +EXPORT_SYMBOL(rtc_time_to_tm); + +/* + * Does the rtc_time represent a valid date/time? + */ +int rtc_valid_tm(struct rtc_time *tm) +{ + if (tm->tm_year < 70 || + tm->tm_mon >= 12 || + tm->tm_mday < 1 || + tm->tm_mday > month_days(tm->tm_mon, tm->tm_year + 1900) || + tm->tm_hour >= 24 || + tm->tm_min >= 60 || + tm->tm_sec >= 60) + return -EINVAL; + + return 0; +} +EXPORT_SYMBOL(rtc_valid_tm); + +/* + * Convert Gregorian date to seconds since 01-01-1970 00:00:00. + */ +int rtc_tm_to_time(struct rtc_time *tm, unsigned long *time) +{ + *time = mktime(tm->tm_year + 1900, tm->tm_mon + 1, tm->tm_mday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + + return 0; +} +EXPORT_SYMBOL(rtc_tm_to_time); + +/* + * Calculate the next alarm time given the requested alarm time mask + * and the current time. + * + * FIXME: for now, we just copy the alarm time because we're lazy (and + * is therefore buggy - setting a 10am alarm at 8pm will not result in + * the alarm triggering.) + */ +void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, struct rtc_time *alrm) +{ + next->tm_year = now->tm_year; + next->tm_mon = now->tm_mon; + next->tm_mday = now->tm_mday; + next->tm_hour = alrm->tm_hour; + next->tm_min = alrm->tm_min; + next->tm_sec = alrm->tm_sec; +} + +static inline int rtc_read_time(struct rtc_ops *ops, struct rtc_time *tm) +{ + memset(tm, 0, sizeof(struct rtc_time)); + return ops->read_time(tm); +} + +static inline int rtc_set_time(struct rtc_ops *ops, struct rtc_time *tm) +{ + int ret; + + ret = rtc_valid_tm(tm); + if (ret == 0) + ret = ops->set_time(tm); + + return ret; +} + +static inline int rtc_read_alarm(struct rtc_ops *ops, struct rtc_wkalrm *alrm) +{ + int ret = -EINVAL; + if (ops->read_alarm) { + memset(alrm, 0, sizeof(struct rtc_wkalrm)); + ret = ops->read_alarm(alrm); + } + return ret; +} + +static inline int rtc_set_alarm(struct rtc_ops *ops, struct rtc_wkalrm *alrm) +{ + int ret = -EINVAL; + if (ops->set_alarm) + ret = ops->set_alarm(alrm); + return ret; +} + +void rtc_update(unsigned long num, unsigned long events) +{ + spin_lock(&rtc_lock); + rtc_irq_data = (rtc_irq_data + (num << 8)) | events; + spin_unlock(&rtc_lock); + + wake_up_interruptible(&rtc_wait); + kill_fasync(&rtc_async_queue, SIGIO, POLL_IN); +} +EXPORT_SYMBOL(rtc_update); + + +static ssize_t +rtc_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) +{ + DECLARE_WAITQUEUE(wait, current); + unsigned long data; + ssize_t ret; + + if (count < sizeof(unsigned long)) + return -EINVAL; + + add_wait_queue(&rtc_wait, &wait); + do { + __set_current_state(TASK_INTERRUPTIBLE); + + spin_lock_irq(&rtc_lock); + data = rtc_irq_data; + rtc_irq_data = 0; + spin_unlock_irq(&rtc_lock); + + if (data != 0) { + ret = 0; + break; + } + if (file->f_flags & O_NONBLOCK) { + ret = -EAGAIN; + break; + } + if (signal_pending(current)) { + ret = -ERESTARTSYS; + break; + } + schedule(); + } while (1); + set_current_state(TASK_RUNNING); + remove_wait_queue(&rtc_wait, &wait); + + if (ret == 0) { + ret = put_user(data, (unsigned long __user *)buf); + if (ret == 0) + ret = sizeof(unsigned long); + } + return ret; +} + +static unsigned int rtc_poll(struct file *file, poll_table *wait) +{ + unsigned long data; + + poll_wait(file, &rtc_wait, wait); + + spin_lock_irq(&rtc_lock); + data = rtc_irq_data; + spin_unlock_irq(&rtc_lock); + + return data != 0 ? POLLIN | POLLRDNORM : 0; +} + +static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, + unsigned long arg) +{ + struct rtc_ops *ops = file->private_data; + struct rtc_time tm; + struct rtc_wkalrm alrm; + void __user *uarg = (void __user *)arg; + int ret = -EINVAL; + + switch (cmd) { + case RTC_ALM_READ: + ret = rtc_read_alarm(ops, &alrm); + if (ret) + break; + ret = copy_to_user(uarg, &alrm.time, sizeof(tm)); + if (ret) + ret = -EFAULT; + break; + + case RTC_ALM_SET: + ret = copy_from_user(&alrm.time, uarg, sizeof(tm)); + if (ret) { + ret = -EFAULT; + break; + } + alrm.enabled = 0; + alrm.pending = 0; + alrm.time.tm_mday = -1; + alrm.time.tm_mon = -1; + alrm.time.tm_year = -1; + alrm.time.tm_wday = -1; + alrm.time.tm_yday = -1; + alrm.time.tm_isdst = -1; + ret = rtc_set_alarm(ops, &alrm); + break; + + case RTC_RD_TIME: + ret = rtc_read_time(ops, &tm); + if (ret) + break; + ret = copy_to_user(uarg, &tm, sizeof(tm)); + if (ret) + ret = -EFAULT; + break; + + case RTC_SET_TIME: + if (!capable(CAP_SYS_TIME)) { + ret = -EACCES; + break; + } + ret = copy_from_user(&tm, uarg, sizeof(tm)); + if (ret) { + ret = -EFAULT; + break; + } + ret = rtc_set_time(ops, &tm); + break; + + case RTC_EPOCH_SET: +#ifndef rtc_epoch + /* + * There were no RTC clocks before 1900. + */ + if (arg < 1900) { + ret = -EINVAL; + break; + } + if (!capable(CAP_SYS_TIME)) { + ret = -EACCES; + break; + } + rtc_epoch = arg; + ret = 0; +#endif + break; + + case RTC_EPOCH_READ: + ret = put_user(rtc_epoch, (unsigned long __user *)uarg); + break; + + case RTC_WKALM_SET: + ret = copy_from_user(&alrm, uarg, sizeof(alrm)); + if (ret) { + ret = -EFAULT; + break; + } + ret = rtc_set_alarm(ops, &alrm); + break; + + case RTC_WKALM_RD: + ret = rtc_read_alarm(ops, &alrm); + if (ret) + break; + ret = copy_to_user(uarg, &alrm, sizeof(alrm)); + if (ret) + ret = -EFAULT; + break; + + default: + if (ops->ioctl) + ret = ops->ioctl(cmd, arg); + break; + } + return ret; +} + +static int rtc_open(struct inode *inode, struct file *file) +{ + int ret; + + down(&rtc_sem); + + if (rtc_inuse) { + ret = -EBUSY; + } else if (!rtc_ops || !try_module_get(rtc_ops->owner)) { + ret = -ENODEV; + } else { + file->private_data = rtc_ops; + + ret = rtc_ops->open ? rtc_ops->open() : 0; + if (ret == 0) { + spin_lock_irq(&rtc_lock); + rtc_irq_data = 0; + spin_unlock_irq(&rtc_lock); + + rtc_inuse = 1; + } + } + up(&rtc_sem); + + return ret; +} + +static int rtc_release(struct inode *inode, struct file *file) +{ + struct rtc_ops *ops = file->private_data; + + if (ops->release) + ops->release(); + + spin_lock_irq(&rtc_lock); + rtc_irq_data = 0; + spin_unlock_irq(&rtc_lock); + + module_put(rtc_ops->owner); + rtc_inuse = 0; + + return 0; +} + +static int rtc_fasync(int fd, struct file *file, int on) +{ + return fasync_helper(fd, file, on, &rtc_async_queue); +} + +static struct file_operations rtc_fops = { + .owner = THIS_MODULE, + .llseek = no_llseek, + .read = rtc_read, + .poll = rtc_poll, + .ioctl = rtc_ioctl, + .open = rtc_open, + .release = rtc_release, + .fasync = rtc_fasync, +}; + +static struct miscdevice rtc_miscdev = { + .minor = RTC_MINOR, + .name = "rtc", + .fops = &rtc_fops, +}; + + +static int rtc_read_proc(char *page, char **start, off_t off, int count, int *eof, void *data) +{ + struct rtc_ops *ops = data; + struct rtc_wkalrm alrm; + struct rtc_time tm; + char *p = page; + + if (rtc_read_time(ops, &tm) == 0) { + p += sprintf(p, + "rtc_time\t: %02d:%02d:%02d\n" + "rtc_date\t: %04d-%02d-%02d\n" + "rtc_epoch\t: %04lu\n", + tm.tm_hour, tm.tm_min, tm.tm_sec, + tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, + rtc_epoch); + } + + if (rtc_read_alarm(ops, &alrm) == 0) { + p += sprintf(p, "alrm_time\t: "); + if ((unsigned int)alrm.time.tm_hour <= 24) + p += sprintf(p, "%02d:", alrm.time.tm_hour); + else + p += sprintf(p, "**:"); + if ((unsigned int)alrm.time.tm_min <= 59) + p += sprintf(p, "%02d:", alrm.time.tm_min); + else + p += sprintf(p, "**:"); + if ((unsigned int)alrm.time.tm_sec <= 59) + p += sprintf(p, "%02d\n", alrm.time.tm_sec); + else + p += sprintf(p, "**\n"); + + p += sprintf(p, "alrm_date\t: "); + if ((unsigned int)alrm.time.tm_year <= 200) + p += sprintf(p, "%04d-", alrm.time.tm_year + 1900); + else + p += sprintf(p, "****-"); + if ((unsigned int)alrm.time.tm_mon <= 11) + p += sprintf(p, "%02d-", alrm.time.tm_mon + 1); + else + p += sprintf(p, "**-"); + if ((unsigned int)alrm.time.tm_mday <= 31) + p += sprintf(p, "%02d\n", alrm.time.tm_mday); + else + p += sprintf(p, "**\n"); + p += sprintf(p, "alrm_wakeup\t: %s\n", + alrm.enabled ? "yes" : "no"); + p += sprintf(p, "alrm_pending\t: %s\n", + alrm.pending ? "yes" : "no"); + } + + if (ops->proc) + p += ops->proc(p); + + return p - page; +} + +int register_rtc(struct rtc_ops *ops) +{ + int ret = -EBUSY; + + down(&rtc_sem); + if (rtc_ops == NULL) { + rtc_ops = ops; + + ret = misc_register(&rtc_miscdev); + if (ret == 0) + create_proc_read_entry("driver/rtc", 0, NULL, + rtc_read_proc, ops); + } + up(&rtc_sem); + + return ret; +} +EXPORT_SYMBOL(register_rtc); + +void unregister_rtc(struct rtc_ops *rtc) +{ + down(&rtc_sem); + if (rtc == rtc_ops) { + remove_proc_entry("driver/rtc", NULL); + misc_deregister(&rtc_miscdev); + rtc_ops = NULL; + } + up(&rtc_sem); +} +EXPORT_SYMBOL(unregister_rtc); diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/configs/datatank2_defconfig linux-88fxx81/arch/arm/configs/datatank2_defconfig --- linux-2.6.12.6-armeb/arch/arm/configs/datatank2_defconfig 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/configs/datatank2_defconfig 2007-01-05 03:23:50.000000000 +1030 @@ -0,0 +1,1282 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.12.6-arm1 +# Thu Jan 4 17:53:50 2007 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_IOMAP=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_HOTPLUG=y +CONFIG_KOBJECT_UEVENT=y +# CONFIG_IKCONFIG is not set +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SHMEM=y +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_CAMELOT is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +CONFIG_ARCH_MV88fxx81=y +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set + +# +# mv88fxx81 Options +# +# CONFIG_ARCH_MV88f1181 is not set +CONFIG_ARCH_MV88f5181=y +CONFIG_MV88F5182=y +CONFIG_MV88F5082=y +# CONFIG_VOIP_RD2 is not set +# CONFIG_MV_88W8660 is not set +CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y +# CONFIG_MV_NAND is not set +# CONFIG_USE_DSP is not set +CONFIG_MV_DMA_COPYUSER=y +# CONFIG_MV_USE_XOR_ENGINE is not set +CONFIG_MV88fxx81_PROC=y +# CONFIG_MV_GENERIC_NAS_FS is not set +CONFIG_UBOOT_STRUCT=y +# CONFIG_MV_DBG_TRACE is not set + +# +# Networking options +# +# CONFIG_MV_EGIGA is not set +CONFIG_MV_GATEWAY=y +# CONFIG_MV_UNIMAC is not set +CONFIG_EGIGA_STATIS=y +# CONFIG_EGIGA_MULTI_Q is not set +CONFIG_MV_GTW_QOS=y +CONFIG_MV_GTW_QOS_NET_IF="eth0" +CONFIG_MV_GTW_QOS_VOIP=y +CONFIG_MV_GTW_QOS_VOIP_TOS="0xA0" +CONFIG_MV_GTW_QOS_VIDEO=y +CONFIG_MV_GTW_QOS_VIDEO_TOS="0x11;0x22" +CONFIG_MV_GTW_IGMP=y +CONFIG_MV_GTW_PROC=y + +# +# cesa options +# +CONFIG_MV_CESA=y +# CONFIG_MV_CESA_TWO_CHAN is not set +CONFIG_MV_CESA_OCF=y +CONFIG_MV_CESA_TOOL=y +CONFIG_SCSI_MVSATA=y + +# +# Sata options +# +CONFIG_MV_SATA_SUPPORT_ATAPI=y +# CONFIG_MV_SATA_ENABLE_1MB_IOS is not set +CONFIG_SATA_NO_DEBUG=y +# CONFIG_SATA_DEBUG_ON_ERROR is not set +# CONFIG_SATA_FULL_DEBUG is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_BIG_ENDIAN is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set + +# +# Bus support +# +CONFIG_ISA_DMA_API=y +CONFIG_PCI=y +# CONFIG_PCI_LEGACY_PROC is not set +# CONFIG_PCI_NAMES is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_SMP is not set +# CONFIG_PREEMPT is not set +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_REORDER=y +# CONFIG_DISCONTIGMEM is not set +CONFIG_LEDS=y +CONFIG_LEDS_TIMER=y +# CONFIG_LEDS_CPU is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyAM0 root=/dev/nfs rw nfsroot=10.4.50.31:/home/rshitrit/cramfs-1.1/cramfs-1.1/shoko2 mem=32M ip=10.4.50.99:10.4.50.31:::ARM:eth0:none" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +CONFIG_FPE_FASTFPE=y +# CONFIG_VFP is not set +# CONFIG_VFP_RUN_FAST_MODE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +CONFIG_NFTL=y +CONFIG_NFTL_RW=y +# CONFIG_INFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_AMDSTD_RETRY=0 +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0xf0000000 +CONFIG_MTD_PHYSMAP_LEN=0x1000000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_EDB7312 is not set +# CONFIG_MTD_IMPA7 is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_ATA_OVER_ETH is not set + +# +# SCSI device support +# +CONFIG_SCSI=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transport Attributes +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set + +# +# SCSI low-level drivers +# +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_EATA is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_FC is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +CONFIG_SCSI_QLA2XXX=y +# CONFIG_SCSI_QLA21XX is not set +# CONFIG_SCSI_QLA22XX is not set +# CONFIG_SCSI_QLA2300 is not set +# CONFIG_SCSI_QLA2322 is not set +# CONFIG_SCSI_QLA6312 is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set + +# +# Multi-device support (RAID and LVM) +# +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_LINEAR=y +CONFIG_MD_RAID0=y +CONFIG_MD_RAID1=y +# CONFIG_MD_RAID10 is not set +CONFIG_MD_RAID5=y +# CONFIG_MD_RAID6 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_IP_TCPDIAG=y +# CONFIG_IP_TCPDIAG_IPV6 is not set +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=m + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set +CONFIG_E100=y +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +CONFIG_E1000=y +CONFIG_E1000_NAPI=y +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +CONFIG_SK98LIN=y +CONFIG_SK98LIN_NAPI=y +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y + +# +# Obsolete Wireless cards support (pre-802.11) +# +CONFIG_STRIP=y + +# +# Wireless 802.11b ISA/PCI cards support +# +# CONFIG_HERMES is not set +# CONFIG_ATMEL is not set + +# +# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support +# +# CONFIG_PRISM54 is not set +CONFIG_NET_WIRELESS=y + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +CONFIG_I2C=m +# CONFIG_I2C_CHARDEV is not set + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_ISA is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_SCx200_ACB is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Hardware Sensors Chip support +# +# CONFIG_I2C_SENSOR is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set + +# +# Other I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_RTC8564 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_SPLIT_ISO=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_BLUETOOTH_TTY is not set +# CONFIG_USB_ACM is not set +CONFIG_USB_PRINTER=y + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_DPCM=y +CONFIG_USB_STORAGE_USBAT=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_MTOUCH is not set +# CONFIG_USB_EGALAX is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB Multimedia devices +# +# CONFIG_USB_DABUSB is not set + +# +# Video4Linux support is needed for USB Multimedia device support +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_AIRPRIME is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP2101 is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +CONFIG_USB_SERIAL_PL2303=y +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OMNINET is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGETKIT is not set +# CONFIG_USB_PHIDGETSERVO is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_SISUSBVGA is not set +CONFIG_USB_TEST=m + +# +# USB ATM/DSL drivers +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +CONFIG_USB_GADGET_DUMMY_HCD=y +CONFIG_USB_DUMMY_HCD=m +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +CONFIG_USB_FILE_STORAGE=m +CONFIG_USB_FILE_STORAGE_TEST=y +# CONFIG_USB_G_SERIAL is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +# CONFIG_JFS_FS is not set + +# +# XFS support +# +CONFIG_XFS_FS=m +# CONFIG_XFS_RT is not set +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_SECURITY is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +# CONFIG_DEVFS_FS is not set +# CONFIG_DEVPTS_FS_XATTR is not set +CONFIG_TMPFS=y +# CONFIG_TMPFS_XATTR is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_NAND=y +# CONFIG_JFFS2_FS_NOR_ECC is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_LDM_PARTITION=y +CONFIG_LDM_DEBUG=y +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +CONFIG_SUN_PARTITION=y +# CONFIG_EFI_PARTITION is not set + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_FRAME_POINTER=y +CONFIG_DEBUG_USER=y + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_BLOWFISH=y +CONFIG_CRYPTO_TWOFISH=y +# CONFIG_CRYPTO_SERPENT is not set +CONFIG_CRYPTO_AES=y +CONFIG_CRYPTO_CAST5=y +CONFIG_CRYPTO_CAST6=y +CONFIG_CRYPTO_TEA=y +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_TEST is not set + +# +# OCF Configuration +# +CONFIG_OCF_OCF=y +CONFIG_OCF_CRYPTODEV=y +CONFIG_OCF_CRYPTOSOFT=y +CONFIG_OCF_DM_CRYPT=y +CONFIG_OCF_BENCH=m + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +CONFIG_CRC32=y +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/configs/db88f5181_defconfig linux-88fxx81/arch/arm/configs/db88f5181_defconfig --- linux-2.6.12.6-armeb/arch/arm/configs/db88f5181_defconfig 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/configs/db88f5181_defconfig 2006-09-27 01:01:36.000000000 +0930 @@ -0,0 +1,1282 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.12.6-arm1 +# Tue Sep 26 18:31:14 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_IOMAP=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_HOTPLUG=y +CONFIG_KOBJECT_UEVENT=y +# CONFIG_IKCONFIG is not set +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SHMEM=y +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_CAMELOT is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +CONFIG_ARCH_MV88fxx81=y +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set + +# +# mv88fxx81 Options +# +# CONFIG_ARCH_MV88f1181 is not set +CONFIG_ARCH_MV88f5181=y +# CONFIG_MV88F5182 is not set +# CONFIG_VOIP_RD2 is not set +# CONFIG_MV_88W8660 is not set +CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y +# CONFIG_MV_NAND is not set +# CONFIG_USE_DSP is not set +CONFIG_MV_DMA_COPYUSER=y +CONFIG_MV88fxx81_PROC=y +# CONFIG_MV_GENERIC_NAS_FS is not set +CONFIG_UBOOT_STRUCT=y +# CONFIG_MV_DBG_TRACE is not set + +# +# Networking options +# +CONFIG_MV_EGIGA=y +# CONFIG_MV_GATEWAY is not set +# CONFIG_MV_UNIMAC is not set +CONFIG_ETH_0_MACADDR="000000000051" +# CONFIG_EGIGA_PROC is not set +# CONFIG_EGIGA_STATIS is not set +# CONFIG_EGIGA_MULTI_Q is not set +CONFIG_SCSI_MVSATA=y + +# +# Sata options +# +CONFIG_MV_SATA_SUPPORT_ATAPI=y +# CONFIG_MV_SATA_ENABLE_1MB_IOS is not set +CONFIG_SATA_NO_DEBUG=y +# CONFIG_SATA_DEBUG_ON_ERROR is not set +# CONFIG_SATA_FULL_DEBUG is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_BIG_ENDIAN is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set + +# +# Bus support +# +CONFIG_ISA_DMA_API=y +CONFIG_PCI=y +# CONFIG_PCI_LEGACY_PROC is not set +# CONFIG_PCI_NAMES is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_SMP is not set +# CONFIG_PREEMPT is not set +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_REORDER=y +# CONFIG_DISCONTIGMEM is not set +CONFIG_LEDS=y +CONFIG_LEDS_TIMER=y +# CONFIG_LEDS_CPU is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyAM0 root=/dev/nfs rw nfsroot=10.4.50.31:/home/rshitrit/cramfs-1.1/cramfs-1.1/shoko2 mem=32M ip=10.4.50.99:10.4.50.31:::ARM:eth0:none" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +CONFIG_FPE_FASTFPE=y +# CONFIG_VFP is not set +# CONFIG_VFP_RUN_FAST_MODE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0xf0000000 +CONFIG_MTD_PHYSMAP_LEN=0x1000000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_EDB7312 is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_ATA_OVER_ETH is not set + +# +# SCSI device support +# +CONFIG_SCSI=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transport Attributes +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set + +# +# SCSI low-level drivers +# +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_EATA is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_FC is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +CONFIG_SCSI_QLA2XXX=y +# CONFIG_SCSI_QLA21XX is not set +# CONFIG_SCSI_QLA22XX is not set +# CONFIG_SCSI_QLA2300 is not set +# CONFIG_SCSI_QLA2322 is not set +# CONFIG_SCSI_QLA6312 is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set + +# +# Multi-device support (RAID and LVM) +# +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_LINEAR=y +CONFIG_MD_RAID0=y +CONFIG_MD_RAID1=y +# CONFIG_MD_RAID10 is not set +CONFIG_MD_RAID5=y +# CONFIG_MD_RAID6 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BLK_DEV_DM is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_IP_TCPDIAG=y +# CONFIG_IP_TCPDIAG_IPV6 is not set +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +CONFIG_NET_PKTGEN=m +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set +CONFIG_E100=y +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +CONFIG_8139CP=y +CONFIG_8139TOO=y +# CONFIG_8139TOO_PIO is not set +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139TOO_8129 is not set +# CONFIG_8139_OLD_RX_RESET is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +CONFIG_E1000=y +CONFIG_E1000_NAPI=y +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +CONFIG_SK98LIN=y +CONFIG_SK98LIN_NAPI=y +# CONFIG_VIA_VELOCITY is not set +CONFIG_TIGON3=y +# CONFIG_BNX2 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y + +# +# Obsolete Wireless cards support (pre-802.11) +# +CONFIG_STRIP=y + +# +# Wireless 802.11b ISA/PCI cards support +# +# CONFIG_HERMES is not set +# CONFIG_ATMEL is not set + +# +# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support +# +# CONFIG_PRISM54 is not set +CONFIG_NET_WIRELESS=y + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +CONFIG_I2C=m +# CONFIG_I2C_CHARDEV is not set + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_ISA is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_SCx200_ACB is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Hardware Sensors Chip support +# +# CONFIG_I2C_SENSOR is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set + +# +# Other I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_RTC8564 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# Multimedia devices +# +CONFIG_VIDEO_DEV=y + +# +# Video For Linux +# + +# +# Video Adapters +# +# CONFIG_VIDEO_BT848 is not set +CONFIG_VIDEO_CPIA=y +CONFIG_VIDEO_CPIA_USB=y +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_TUNER_3036 is not set +CONFIG_VIDEO_STRADIS=y +# CONFIG_VIDEO_SAA7134 is not set +CONFIG_VIDEO_MXB=m +# CONFIG_VIDEO_DPC is not set +# CONFIG_VIDEO_HEXIUM_ORION is not set +# CONFIG_VIDEO_HEXIUM_GEMINI is not set +# CONFIG_VIDEO_CX88 is not set +# CONFIG_VIDEO_OVCAMCHIP is not set + +# +# Radio Adapters +# +CONFIG_RADIO_GEMTEK_PCI=y +CONFIG_RADIO_MAXIRADIO=y +CONFIG_RADIO_MAESTRO=y + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +CONFIG_VIDEO_SAA7146=m +CONFIG_VIDEO_SAA7146_VV=m +CONFIG_VIDEO_VIDEOBUF=m +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEO_BUF=m + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +# CONFIG_SND is not set + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_SPLIT_ISO=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +CONFIG_USB_AUDIO=y +CONFIG_USB_BLUETOOTH_TTY=y +CONFIG_USB_MIDI=y +CONFIG_USB_ACM=y +CONFIG_USB_PRINTER=y + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_DPCM=y +# CONFIG_USB_STORAGE_USBAT is not set +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y + +# +# USB Input Devices +# +CONFIG_USB_HID=y +CONFIG_USB_HIDINPUT=y +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_MTOUCH is not set +# CONFIG_USB_EGALAX is not set +# CONFIG_USB_XPAD is not set +CONFIG_USB_ATI_REMOTE=y + +# +# USB Imaging devices +# +CONFIG_USB_MDC800=y +CONFIG_USB_MICROTEK=y + +# +# USB Multimedia devices +# +# CONFIG_USB_DABUSB is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_DSBR is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +CONFIG_USB_OV511=y +CONFIG_USB_SE401=y +# CONFIG_USB_SN9C102 is not set +CONFIG_USB_STV680=y +# CONFIG_USB_PWC is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_PEGASUS=y +CONFIG_USB_RTL8150=y +CONFIG_USB_USBNET=y + +# +# USB Host-to-Host Cables +# +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +CONFIG_USB_BELKIN=y +CONFIG_USB_GENESYS=y +CONFIG_USB_NET1080=y +CONFIG_USB_PL2301=y +CONFIG_USB_KC2190=y + +# +# Intelligent USB Devices/Gadgets +# +CONFIG_USB_ARMLINUX=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_ZAURUS=y +CONFIG_USB_CDCETHER=y + +# +# USB Network Adapters +# +CONFIG_USB_AX8817X=y +# CONFIG_USB_ZD1201 is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +CONFIG_USB_EMI62=y +CONFIG_USB_EMI26=y +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGETKIT is not set +# CONFIG_USB_PHIDGETSERVO is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_SISUSBVGA is not set +CONFIG_USB_TEST=m + +# +# USB ATM/DSL drivers +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +CONFIG_USB_GADGET_DUMMY_HCD=y +CONFIG_USB_DUMMY_HCD=m +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +CONFIG_USB_FILE_STORAGE=m +CONFIG_USB_FILE_STORAGE_TEST=y +# CONFIG_USB_G_SERIAL is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +# CONFIG_JFS_FS is not set + +# +# XFS support +# +CONFIG_XFS_FS=m +# CONFIG_XFS_RT is not set +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_SECURITY is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +# CONFIG_DEVFS_FS is not set +# CONFIG_DEVPTS_FS_XATTR is not set +CONFIG_TMPFS=y +# CONFIG_TMPFS_XATTR is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +# CONFIG_JFFS2_FS_NAND is not set +# CONFIG_JFFS2_FS_NOR_ECC is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_LDM_PARTITION=y +CONFIG_LDM_DEBUG=y +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +CONFIG_SUN_PARTITION=y +# CONFIG_EFI_PARTITION is not set + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_FRAME_POINTER=y +CONFIG_DEBUG_USER=y + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_TEST is not set + +# +# OCF Configuration +# +# CONFIG_OCF_OCF is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/configs/db88f5182_defconfig linux-88fxx81/arch/arm/configs/db88f5182_defconfig --- linux-2.6.12.6-armeb/arch/arm/configs/db88f5182_defconfig 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/configs/db88f5182_defconfig 2006-09-27 01:02:48.000000000 +0930 @@ -0,0 +1,1234 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.12.6-arm1 +# Tue Sep 26 18:32:38 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_IOMAP=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_HOTPLUG=y +CONFIG_KOBJECT_UEVENT=y +# CONFIG_IKCONFIG is not set +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SHMEM=y +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_CAMELOT is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +CONFIG_ARCH_MV88fxx81=y +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set + +# +# mv88fxx81 Options +# +# CONFIG_ARCH_MV88f1181 is not set +CONFIG_ARCH_MV88f5181=y +CONFIG_MV88F5182=y +CONFIG_MV88F5082=y +# CONFIG_VOIP_RD2 is not set +# CONFIG_MV_88W8660 is not set +CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y +# CONFIG_MV_NAND is not set +# CONFIG_USE_DSP is not set +CONFIG_MV_DMA_COPYUSER=y +# CONFIG_MV_USE_XOR_ENGINE is not set +CONFIG_MV88fxx81_PROC=y +# CONFIG_MV_GENERIC_NAS_FS is not set +CONFIG_UBOOT_STRUCT=y +# CONFIG_MV_DBG_TRACE is not set + +# +# Networking options +# +CONFIG_MV_EGIGA=y +# CONFIG_MV_GATEWAY is not set +# CONFIG_MV_UNIMAC is not set +CONFIG_ETH_0_MACADDR="000000000051" +# CONFIG_EGIGA_PROC is not set +# CONFIG_EGIGA_STATIS is not set +# CONFIG_EGIGA_MULTI_Q is not set + +# +# cesa options +# +CONFIG_MV_CESA=y +# CONFIG_MV_CESA_TWO_CHAN is not set +CONFIG_MV_CESA_OCF=y +CONFIG_MV_CESA_TOOL=y +CONFIG_SCSI_MVSATA=y + +# +# Sata options +# +CONFIG_MV_SATA_SUPPORT_ATAPI=y +# CONFIG_MV_SATA_ENABLE_1MB_IOS is not set +CONFIG_SATA_NO_DEBUG=y +# CONFIG_SATA_DEBUG_ON_ERROR is not set +# CONFIG_SATA_FULL_DEBUG is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_BIG_ENDIAN is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set + +# +# Bus support +# +CONFIG_ISA_DMA_API=y +CONFIG_PCI=y +# CONFIG_PCI_LEGACY_PROC is not set +# CONFIG_PCI_NAMES is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_SMP is not set +# CONFIG_PREEMPT is not set +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_REORDER=y +# CONFIG_DISCONTIGMEM is not set +CONFIG_LEDS=y +CONFIG_LEDS_TIMER=y +# CONFIG_LEDS_CPU is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyAM0 root=/dev/nfs rw nfsroot=10.4.50.31:/home/rshitrit/cramfs-1.1/cramfs-1.1/shoko2 mem=32M ip=10.4.50.99:10.4.50.31:::ARM:eth0:none" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +CONFIG_FPE_FASTFPE=y +# CONFIG_VFP is not set +# CONFIG_VFP_RUN_FAST_MODE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +CONFIG_NFTL=y +CONFIG_NFTL_RW=y +# CONFIG_INFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_AMDSTD_RETRY=0 +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0xf0000000 +CONFIG_MTD_PHYSMAP_LEN=0x1000000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_EDB7312 is not set +# CONFIG_MTD_IMPA7 is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_ATA_OVER_ETH is not set + +# +# SCSI device support +# +CONFIG_SCSI=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transport Attributes +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set + +# +# SCSI low-level drivers +# +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_EATA is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_FC is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +CONFIG_SCSI_QLA2XXX=y +# CONFIG_SCSI_QLA21XX is not set +# CONFIG_SCSI_QLA22XX is not set +# CONFIG_SCSI_QLA2300 is not set +# CONFIG_SCSI_QLA2322 is not set +# CONFIG_SCSI_QLA6312 is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set + +# +# Multi-device support (RAID and LVM) +# +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_LINEAR=y +CONFIG_MD_RAID0=y +CONFIG_MD_RAID1=y +# CONFIG_MD_RAID10 is not set +CONFIG_MD_RAID5=y +# CONFIG_MD_RAID6 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_IP_TCPDIAG=y +# CONFIG_IP_TCPDIAG_IPV6 is not set +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=m + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set +CONFIG_E100=y +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +CONFIG_E1000=y +CONFIG_E1000_NAPI=y +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +CONFIG_SK98LIN=y +CONFIG_SK98LIN_NAPI=y +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y + +# +# Obsolete Wireless cards support (pre-802.11) +# +CONFIG_STRIP=y + +# +# Wireless 802.11b ISA/PCI cards support +# +# CONFIG_HERMES is not set +# CONFIG_ATMEL is not set + +# +# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support +# +# CONFIG_PRISM54 is not set +CONFIG_NET_WIRELESS=y + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +CONFIG_I2C=m +# CONFIG_I2C_CHARDEV is not set + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_ISA is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_SCx200_ACB is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Hardware Sensors Chip support +# +# CONFIG_I2C_SENSOR is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set + +# +# Other I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_RTC8564 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_SPLIT_ISO=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_BLUETOOTH_TTY is not set +# CONFIG_USB_ACM is not set +CONFIG_USB_PRINTER=y + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_DPCM=y +CONFIG_USB_STORAGE_USBAT=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_MTOUCH is not set +# CONFIG_USB_EGALAX is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB Multimedia devices +# +# CONFIG_USB_DABUSB is not set + +# +# Video4Linux support is needed for USB Multimedia device support +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGETKIT is not set +# CONFIG_USB_PHIDGETSERVO is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_SISUSBVGA is not set +CONFIG_USB_TEST=m + +# +# USB ATM/DSL drivers +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +CONFIG_USB_GADGET_DUMMY_HCD=y +CONFIG_USB_DUMMY_HCD=m +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +CONFIG_USB_FILE_STORAGE=m +CONFIG_USB_FILE_STORAGE_TEST=y +# CONFIG_USB_G_SERIAL is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +# CONFIG_JFS_FS is not set + +# +# XFS support +# +CONFIG_XFS_FS=m +# CONFIG_XFS_RT is not set +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_SECURITY is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +# CONFIG_DEVFS_FS is not set +# CONFIG_DEVPTS_FS_XATTR is not set +CONFIG_TMPFS=y +# CONFIG_TMPFS_XATTR is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_NAND=y +# CONFIG_JFFS2_FS_NOR_ECC is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_LDM_PARTITION=y +CONFIG_LDM_DEBUG=y +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +CONFIG_SUN_PARTITION=y +# CONFIG_EFI_PARTITION is not set + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_FRAME_POINTER=y +CONFIG_DEBUG_USER=y + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_BLOWFISH=y +CONFIG_CRYPTO_TWOFISH=y +# CONFIG_CRYPTO_SERPENT is not set +CONFIG_CRYPTO_AES=y +CONFIG_CRYPTO_CAST5=y +CONFIG_CRYPTO_CAST6=y +CONFIG_CRYPTO_TEA=y +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_TEST is not set + +# +# OCF Configuration +# +CONFIG_OCF_OCF=y +CONFIG_OCF_CRYPTODEV=y +CONFIG_OCF_CRYPTOSOFT=y +CONFIG_OCF_DM_CRYPT=y +CONFIG_OCF_BENCH=m + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +CONFIG_CRC32=y +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/configs/db88f5281_vfp_defconfig linux-88fxx81/arch/arm/configs/db88f5281_vfp_defconfig --- linux-2.6.12.6-armeb/arch/arm/configs/db88f5281_vfp_defconfig 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/configs/db88f5281_vfp_defconfig 2006-09-27 01:02:15.000000000 +0930 @@ -0,0 +1,1281 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.12.6-arm1 +# Tue Sep 26 18:32:05 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_IOMAP=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_HOTPLUG=y +CONFIG_KOBJECT_UEVENT=y +# CONFIG_IKCONFIG is not set +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SHMEM=y +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_CAMELOT is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +CONFIG_ARCH_MV88fxx81=y +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set + +# +# mv88fxx81 Options +# +# CONFIG_ARCH_MV88f1181 is not set +CONFIG_ARCH_MV88f5181=y +# CONFIG_MV88F5182 is not set +# CONFIG_VOIP_RD2 is not set +# CONFIG_MV_88W8660 is not set +CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y +# CONFIG_MV_NAND is not set +CONFIG_USE_DSP=y +CONFIG_MV_DMA_COPYUSER=y +CONFIG_MV88fxx81_PROC=y +# CONFIG_MV_GENERIC_NAS_FS is not set +CONFIG_UBOOT_STRUCT=y +# CONFIG_MV_DBG_TRACE is not set + +# +# Networking options +# +CONFIG_MV_EGIGA=y +# CONFIG_MV_GATEWAY is not set +# CONFIG_MV_UNIMAC is not set +CONFIG_ETH_0_MACADDR="000000000051" +# CONFIG_EGIGA_PROC is not set +# CONFIG_EGIGA_STATIS is not set +# CONFIG_EGIGA_MULTI_Q is not set +CONFIG_SCSI_MVSATA=y + +# +# Sata options +# +CONFIG_MV_SATA_SUPPORT_ATAPI=y +# CONFIG_MV_SATA_ENABLE_1MB_IOS is not set +CONFIG_SATA_NO_DEBUG=y +# CONFIG_SATA_DEBUG_ON_ERROR is not set +# CONFIG_SATA_FULL_DEBUG is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_BIG_ENDIAN is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set + +# +# Bus support +# +CONFIG_ISA_DMA_API=y +CONFIG_PCI=y +# CONFIG_PCI_LEGACY_PROC is not set +# CONFIG_PCI_NAMES is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_SMP is not set +# CONFIG_PREEMPT is not set +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_REORDER=y +# CONFIG_DISCONTIGMEM is not set +CONFIG_LEDS=y +CONFIG_LEDS_TIMER=y +# CONFIG_LEDS_CPU is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyAM0 root=/dev/nfs rw nfsroot=10.4.50.31:/home/rshitrit/cramfs-1.1/cramfs-1.1/shoko2 mem=32M ip=10.4.50.99:10.4.50.31:::ARM:eth0:none" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +CONFIG_FPE_FASTFPE=y +CONFIG_VFP=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0xf0000000 +CONFIG_MTD_PHYSMAP_LEN=0x1000000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_EDB7312 is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_ATA_OVER_ETH is not set + +# +# SCSI device support +# +CONFIG_SCSI=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transport Attributes +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set + +# +# SCSI low-level drivers +# +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_EATA is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_FC is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +CONFIG_SCSI_QLA2XXX=y +# CONFIG_SCSI_QLA21XX is not set +# CONFIG_SCSI_QLA22XX is not set +# CONFIG_SCSI_QLA2300 is not set +# CONFIG_SCSI_QLA2322 is not set +# CONFIG_SCSI_QLA6312 is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set + +# +# Multi-device support (RAID and LVM) +# +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_LINEAR=y +CONFIG_MD_RAID0=y +CONFIG_MD_RAID1=y +# CONFIG_MD_RAID10 is not set +CONFIG_MD_RAID5=y +# CONFIG_MD_RAID6 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BLK_DEV_DM is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_IP_TCPDIAG=y +# CONFIG_IP_TCPDIAG_IPV6 is not set +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +CONFIG_NET_PKTGEN=m +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set +CONFIG_E100=y +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +CONFIG_8139CP=y +CONFIG_8139TOO=y +# CONFIG_8139TOO_PIO is not set +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139TOO_8129 is not set +# CONFIG_8139_OLD_RX_RESET is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +CONFIG_E1000=y +CONFIG_E1000_NAPI=y +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +CONFIG_SK98LIN=y +CONFIG_SK98LIN_NAPI=y +# CONFIG_VIA_VELOCITY is not set +CONFIG_TIGON3=y +# CONFIG_BNX2 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y + +# +# Obsolete Wireless cards support (pre-802.11) +# +CONFIG_STRIP=y + +# +# Wireless 802.11b ISA/PCI cards support +# +# CONFIG_HERMES is not set +# CONFIG_ATMEL is not set + +# +# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support +# +# CONFIG_PRISM54 is not set +CONFIG_NET_WIRELESS=y + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +CONFIG_I2C=m +# CONFIG_I2C_CHARDEV is not set + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_ISA is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_SCx200_ACB is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Hardware Sensors Chip support +# +# CONFIG_I2C_SENSOR is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set + +# +# Other I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_RTC8564 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# Multimedia devices +# +CONFIG_VIDEO_DEV=y + +# +# Video For Linux +# + +# +# Video Adapters +# +# CONFIG_VIDEO_BT848 is not set +CONFIG_VIDEO_CPIA=y +CONFIG_VIDEO_CPIA_USB=y +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_TUNER_3036 is not set +CONFIG_VIDEO_STRADIS=y +# CONFIG_VIDEO_SAA7134 is not set +CONFIG_VIDEO_MXB=m +# CONFIG_VIDEO_DPC is not set +# CONFIG_VIDEO_HEXIUM_ORION is not set +# CONFIG_VIDEO_HEXIUM_GEMINI is not set +# CONFIG_VIDEO_CX88 is not set +# CONFIG_VIDEO_OVCAMCHIP is not set + +# +# Radio Adapters +# +CONFIG_RADIO_GEMTEK_PCI=y +CONFIG_RADIO_MAXIRADIO=y +CONFIG_RADIO_MAESTRO=y + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +CONFIG_VIDEO_SAA7146=m +CONFIG_VIDEO_SAA7146_VV=m +CONFIG_VIDEO_VIDEOBUF=m +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEO_BUF=m + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +# CONFIG_SND is not set + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_SPLIT_ISO=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +CONFIG_USB_AUDIO=y +CONFIG_USB_BLUETOOTH_TTY=y +CONFIG_USB_MIDI=y +CONFIG_USB_ACM=y +CONFIG_USB_PRINTER=y + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_DPCM=y +# CONFIG_USB_STORAGE_USBAT is not set +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y + +# +# USB Input Devices +# +CONFIG_USB_HID=y +CONFIG_USB_HIDINPUT=y +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_MTOUCH is not set +# CONFIG_USB_EGALAX is not set +# CONFIG_USB_XPAD is not set +CONFIG_USB_ATI_REMOTE=y + +# +# USB Imaging devices +# +CONFIG_USB_MDC800=y +CONFIG_USB_MICROTEK=y + +# +# USB Multimedia devices +# +# CONFIG_USB_DABUSB is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_DSBR is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +CONFIG_USB_OV511=y +CONFIG_USB_SE401=y +# CONFIG_USB_SN9C102 is not set +CONFIG_USB_STV680=y +# CONFIG_USB_PWC is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_PEGASUS=y +CONFIG_USB_RTL8150=y +CONFIG_USB_USBNET=y + +# +# USB Host-to-Host Cables +# +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +CONFIG_USB_BELKIN=y +CONFIG_USB_GENESYS=y +CONFIG_USB_NET1080=y +CONFIG_USB_PL2301=y +CONFIG_USB_KC2190=y + +# +# Intelligent USB Devices/Gadgets +# +CONFIG_USB_ARMLINUX=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_ZAURUS=y +CONFIG_USB_CDCETHER=y + +# +# USB Network Adapters +# +CONFIG_USB_AX8817X=y +# CONFIG_USB_ZD1201 is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +CONFIG_USB_EMI62=y +CONFIG_USB_EMI26=y +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGETKIT is not set +# CONFIG_USB_PHIDGETSERVO is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_SISUSBVGA is not set +CONFIG_USB_TEST=m + +# +# USB ATM/DSL drivers +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +CONFIG_USB_GADGET_DUMMY_HCD=y +CONFIG_USB_DUMMY_HCD=m +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +CONFIG_USB_FILE_STORAGE=m +CONFIG_USB_FILE_STORAGE_TEST=y +# CONFIG_USB_G_SERIAL is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +# CONFIG_JFS_FS is not set + +# +# XFS support +# +CONFIG_XFS_FS=m +# CONFIG_XFS_RT is not set +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_SECURITY is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +# CONFIG_DEVFS_FS is not set +# CONFIG_DEVPTS_FS_XATTR is not set +CONFIG_TMPFS=y +# CONFIG_TMPFS_XATTR is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +# CONFIG_JFFS2_FS_NAND is not set +# CONFIG_JFFS2_FS_NOR_ECC is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_LDM_PARTITION=y +CONFIG_LDM_DEBUG=y +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +CONFIG_SUN_PARTITION=y +# CONFIG_EFI_PARTITION is not set + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_FRAME_POINTER=y +CONFIG_DEBUG_USER=y + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_TEST is not set + +# +# OCF Configuration +# +# CONFIG_OCF_OCF is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/configs/orionas_defconfig linux-88fxx81/arch/arm/configs/orionas_defconfig --- linux-2.6.12.6-armeb/arch/arm/configs/orionas_defconfig 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/configs/orionas_defconfig 2006-08-30 20:55:32.000000000 +0930 @@ -0,0 +1,1165 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.12.6-arm1 +# Tue Aug 29 20:05:19 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_IOMAP=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_HOTPLUG=y +CONFIG_KOBJECT_UEVENT=y +# CONFIG_IKCONFIG is not set +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SHMEM=y +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_CAMELOT is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +CONFIG_ARCH_MV88fxx81=y +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set + +# +# mv88fxx81 Options +# +# CONFIG_ARCH_MV88f1181 is not set +CONFIG_ARCH_MV88f5181=y +CONFIG_MV88F5182=y +# CONFIG_VOIP_RD2 is not set +# CONFIG_MV_88W8660 is not set +CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y +# CONFIG_MV_NAND is not set +# CONFIG_USE_DSP is not set +CONFIG_MV_DMA_COPYUSER=y +# CONFIG_MV_USE_XOR_ENGINE is not set +CONFIG_MV88fxx81_PROC=y +CONFIG_MV_GENERIC_NAS_FS=y +CONFIG_UBOOT_STRUCT=y +# CONFIG_MV_DBG_TRACE is not set + +# +# Networking options +# +CONFIG_MV_EGIGA=y +# CONFIG_MV_GATEWAY is not set +# CONFIG_MV_UNIMAC is not set +CONFIG_ETH_0_MACADDR="000000000051" +# CONFIG_EGIGA_PROC is not set +# CONFIG_EGIGA_STATIS is not set +# CONFIG_EGIGA_MULTI_Q is not set + +# +# cesa options +# +CONFIG_MV_CESA=y +# CONFIG_MV_CESA_TWO_CHAN is not set +CONFIG_MV_CESA_TOOL=y +# CONFIG_MV_CESA_TEST is not set +CONFIG_SCSI_MVSATA=y + +# +# Sata options +# +CONFIG_MV_SATA_SUPPORT_ATAPI=y +CONFIG_SATA_NO_DEBUG=y +# CONFIG_SATA_DEBUG_ON_ERROR is not set +# CONFIG_SATA_FULL_DEBUG is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_BIG_ENDIAN is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set + +# +# Bus support +# +CONFIG_ISA_DMA_API=y +CONFIG_PCI=y +# CONFIG_PCI_LEGACY_PROC is not set +# CONFIG_PCI_NAMES is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_SMP is not set +# CONFIG_PREEMPT is not set +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_REORDER=y +# CONFIG_DISCONTIGMEM is not set +CONFIG_LEDS=y +CONFIG_LEDS_TIMER=y +# CONFIG_LEDS_CPU is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyAM0 root=/dev/nfs rw nfsroot=10.4.50.31:/home/rshitrit/cramfs-1.1/cramfs-1.1/shoko2 mem=32M ip=10.4.50.99:10.4.50.31:::ARM:eth0:none" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +CONFIG_FPE_FASTFPE=y +# CONFIG_VFP is not set +CONFIG_VFP_RUN_FAST_MODE=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_AFS_PARTS=y + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_FTL=y +CONFIG_NFTL=y +# CONFIG_NFTL_RW is not set +# CONFIG_INFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_AMDSTD_RETRY=0 +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_RAM=y +CONFIG_MTD_ROM=y +CONFIG_MTD_ABSENT=y + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0xf0000000 +CONFIG_MTD_PHYSMAP_LEN=0x1000000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_EDB7312 is not set +# CONFIG_MTD_IMPA7 is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_ATA_OVER_ETH is not set + +# +# SCSI device support +# +CONFIG_SCSI=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transport Attributes +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set + +# +# SCSI low-level drivers +# +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_EATA is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_FC is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +CONFIG_SCSI_QLA2XXX=y +# CONFIG_SCSI_QLA21XX is not set +# CONFIG_SCSI_QLA22XX is not set +# CONFIG_SCSI_QLA2300 is not set +# CONFIG_SCSI_QLA2322 is not set +# CONFIG_SCSI_QLA6312 is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set + +# +# Multi-device support (RAID and LVM) +# +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_LINEAR=y +CONFIG_MD_RAID0=y +CONFIG_MD_RAID1=y +# CONFIG_MD_RAID10 is not set +CONFIG_MD_RAID5=y +# CONFIG_MD_RAID6 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BLK_DEV_DM is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_IP_TCPDIAG=y +# CONFIG_IP_TCPDIAG_IPV6 is not set +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_NET_PCI is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +CONFIG_SK98LIN=y +# CONFIG_SK98LIN_NAPI is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y + +# +# Obsolete Wireless cards support (pre-802.11) +# +CONFIG_STRIP=y + +# +# Wireless 802.11b ISA/PCI cards support +# +# CONFIG_HERMES is not set +# CONFIG_ATMEL is not set + +# +# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support +# +# CONFIG_PRISM54 is not set +CONFIG_NET_WIRELESS=y + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +CONFIG_I2C=m +# CONFIG_I2C_CHARDEV is not set + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_ISA is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_SCx200_ACB is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Hardware Sensors Chip support +# +# CONFIG_I2C_SENSOR is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set + +# +# Other I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_RTC8564 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_SPLIT_ISO=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_BLUETOOTH_TTY is not set +# CONFIG_USB_ACM is not set +CONFIG_USB_PRINTER=y + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_DPCM=y +# CONFIG_USB_STORAGE_USBAT is not set +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_MTOUCH is not set +# CONFIG_USB_EGALAX is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB Multimedia devices +# +# CONFIG_USB_DABUSB is not set + +# +# Video4Linux support is needed for USB Multimedia device support +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGETKIT is not set +# CONFIG_USB_PHIDGETSERVO is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_TEST is not set + +# +# USB ATM/DSL drivers +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set + +# +# XFS support +# +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +# CONFIG_ZISOFS is not set +CONFIG_UDF_FS=y +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +# CONFIG_DEVFS_FS is not set +# CONFIG_DEVPTS_FS_XATTR is not set +CONFIG_TMPFS=y +# CONFIG_TMPFS_XATTR is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_EFI_PARTITION is not set + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_FRAME_POINTER=y +CONFIG_DEBUG_USER=y + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_TEST is not set + +# +# OCF Configuration +# +# CONFIG_OCF_OCF is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/fastfpe/CPDO.S linux-88fxx81/arch/arm/fastfpe/CPDO.S --- linux-2.6.12.6-armeb/arch/arm/fastfpe/CPDO.S 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/fastfpe/CPDO.S 2006-08-30 19:27:36.000000000 +0930 @@ -0,0 +1,682 @@ +/* +The FP structure has 4 words reserved for each register, the first is used just +for the sign in bit 31, the second and third are for the mantissa (unsigned +integer, high 32 bit first) and the fourth is the exponent (signed integer). +The mantissa is always normalized. + +If the exponent is 0x80000000, that is the most negative value, the number +represented is 0 and both mantissa words are also 0. + +If the exponent is 0x7fffffff, that is the biggest positive value, the number +represented is infinity if the high 32 mantissa bit are also 0, otherwise it is +a NaN. The low 32 mantissa bit are 0 if the number represented is infinity. + +Decimal and packed decimal numbers are not supported yet. + +The parameters to these functions are r0=destination pointer, r1 and r2 +source pointers. r4 is the instruction. They may use r0-r8 and r14. They return +to fastfpe_next, except CPDO_rnf_core which expects the return address in r14. +*/ + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_adf +CPDO_adf: + ldmia r1,{r1,r3,r5,r7} + ldmia r2,{r2,r4,r6,r8} + + cmp r7,#0x7fffffff + cmpne r8,#0x7fffffff + beq CPDO_adf_extra + + cmp r1,r2 + bne CPDO_suf_s + +CPDO_adf_s: + subs r2,r7,r8 + bge CPDO_adf_2nd + + mov r7,r8 + rsb r2,r2,#0 + cmp r2,#32 + ble CPDO_adf_1st2 + + sub r2,r2,#32 + cmp r2,#32 + movgt r2,#32 + mov r5,r3,lsr r2 + mov r3,#0 + b CPDO_adf_add + +CPDO_adf_1st2: + rsb r8,r2,#32 + mov r5,r5,lsr r2 + orr r5,r5,r3,lsl r8 + mov r3,r3,lsr r2 @ 1. op normalized + b CPDO_adf_add + +CPDO_adf_2nd: + cmp r2,#32 + ble CPDO_adf_2nd2 + + sub r2,r2,#32 + cmp r2,#32 + movgt r2,#32 + mov r6,r4,lsr r2 + mov r4,#0 + b CPDO_adf_add + +CPDO_adf_2nd2: + rsb r8,r2,#32 + mov r6,r6,lsr r2 + orr r6,r6,r4,lsl r8 + mov r4,r4,lsr r2 @ 2. op normalized + +CPDO_adf_add: + adds r5,r5,r6 + adcs r3,r3,r4 @ do addition + bcc CPDO_adf_end + + add r7,r7,#1 + movs r3,r3,rrx + mov r5,r5,rrx @ correct for overflow + +CPDO_adf_end: + cmp r7,#0x20000000 + bge CPDO_inf + + stmia r0,{r1,r3,r5,r7} + b fastfpe_next + +CPDO_adf_extra: + cmp r7,#0x7fffffff @ was it the 1st ? + bne CPDO_infnan_2 @ no it was the 2nd + cmp r8,#0x7fffffff @ if 1st, 2nd too ? + bne CPDO_infnan_1 @ no only 1st + cmp r3,#0 + cmpeq r4,#0 + bne CPDO_nan_12 + b CPDO_inf + +/*---------------------------------------------------------------------------*/ + +CPDO_infnan_1: + stmia r0,{r1,r3,r5,r7} + b fastfpe_next + +CPDO_infnan_2: + stmia r0,{r2,r4,r6,r8} + b fastfpe_next + +CPDO_nan_12: + orr r2,r3,r4 + b CPDO_inf_1 + +CPDO_nan: + mov r2,#0x40000000 @ create non signalling NaN + b CPDO_inf_1 + +CPDO_inf: + mov r2,#0 +CPDO_inf_1: + mov r3,#0 + mov r4,#0x7fffffff +CPDO_store_1234: + stmia r0,{r1,r2,r3,r4} + b fastfpe_next + +CPDO_zero: + mov r1,#0 +CPDO_zero_1: + mov r2,#0 + mov r3,#0 + mov r4,#0x80000000 + stmia r0,{r1,r2,r3,r4} + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_suf +CPDO_suf: + ldmia r1,{r1,r3,r5,r7} + ldmia r2,{r2,r4,r6,r8} + +CPDO_suf_l: + cmp r7,#0x7fffffff + cmpne r8,#0x7fffffff + beq CPDO_suf_extra + + cmp r1,r2 + bne CPDO_adf_s + +CPDO_suf_s: + subs r2,r7,r8 @ determine greater number + bgt CPDO_suf_2nd @ first number is greater + blt CPDO_suf_1st @ second number is greater + cmp r3,r4 @ also mantissa is important + cmpeq r5,r6 + bhi CPDO_suf_2nd @ first number is greater + beq CPDO_zero + +CPDO_suf_1st: + eor r1,r1,#0x80000000 @ second number is greater, invert sign + mov r7,r8 + rsb r2,r2,#0 + cmp r2,#32 + ble CPDO_suf_1st2 + + sub r2,r2,#32 + cmp r2,#32 + movgt r2,#32 + mov r5,r3,lsr r2 + mov r3,#0 + b CPDO_suf_1st_sub + +CPDO_suf_1st2: + rsb r8,r2,#32 + mov r5,r5,lsr r2 + orr r5,r5,r3,lsl r8 + mov r3,r3,lsr r2 @ 1. op normalized + +CPDO_suf_1st_sub: + subs r5,r6,r5 @ do subtraction + sbc r3,r4,r3 + b CPDO_suf_norm + +CPDO_suf_2nd: + cmp r2,#32 + ble CPDO_suf_2nd2 + + sub r2,r2,#32 + cmp r2,#32 + movgt r2,#32 + mov r6,r4,lsr r2 + mov r4,#0 + b CPDO_suf_2nd_sub + +CPDO_suf_2nd2: + rsb r8,r2,#32 + mov r6,r6,lsr r2 + orr r6,r6,r4,lsl r8 + mov r4,r4,lsr r2 @ 2. op normalized + +CPDO_suf_2nd_sub: + subs r5,r5,r6 + sbc r3,r3,r4 @ do subtraction + +CPDO_suf_norm: + teq r3,#0 @ normalize 32bit + moveq r3,r5 + moveq r5,#0 + subeq r7,r7,#32 + + cmp r3,#0x00010000 @ 16bit + movcc r3,r3,lsl#16 + orrcc r3,r3,r5,lsr#16 + movcc r5,r5,lsl#16 + subcc r7,r7,#16 + + cmp r3,#0x01000000 @ 8bit + movcc r3,r3,lsl#8 + orrcc r3,r3,r5,lsr#24 + movcc r5,r5,lsl#8 + subcc r7,r7,#8 + + cmp r3,#0x10000000 @ 4bit + movcc r3,r3,lsl#4 + orrcc r3,r3,r5,lsr#28 + movcc r5,r5,lsl#4 + subcc r7,r7,#4 + + cmp r3,#0x40000000 @ 2bit + movcc r3,r3,lsl#2 + orrcc r3,r3,r5,lsr#30 + movcc r5,r5,lsl#2 + subcc r7,r7,#2 + + cmp r3,#0x80000000 @ 1bit + movcc r3,r3,lsl#1 + orrcc r3,r3,r5,lsr#31 + movcc r5,r5,lsl#1 + subcc r7,r7,#1 + + cmp r7,#0xe0000000 + ble CPDO_zero_1 + + stmia r0,{r1,r3,r5,r7} + b fastfpe_next + +CPDO_suf_extra: + cmp r7,#0x7fffffff @ was it the 1st ? + eorne r2,r2,#0x80000000 @ change sign, might have been INF + bne CPDO_infnan_2 @ no it was the 2nd + cmp r8,#0x7fffffff @ if 1st, 2nd too ? + bne CPDO_infnan_1 @ no only 1st + cmp r3,#0 + cmpeq r4,#0 + bne CPDO_nan_12 + b CPDO_nan @ here is difference with adf ! + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_rsf +CPDO_rsf: + mov r3,r2 + ldmia r1,{r2,r4,r6,r8} + ldmia r3,{r1,r3,r5,r7} + b CPDO_suf_l + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_muf +CPDO_muf: + ldmia r1,{r1,r3,r5,r7} + ldmia r2,{r2,r4,r6,r8} + + cmp r7,#0x7fffffff + cmpne r8,#0x7fffffff + beq CPDO_muf_extra + + eor r1,r1,r2 + adds r8,r7,r8 + bvs CPDO_zero_1 + + umull r7,r2,r3,r4 + umull r14,r3,r6,r3 + adds r7,r7,r3 @ r2|r7|r14 = r2|r7|#0 + #0|r3|r14 + adc r2,r2,#0 + umull r4,r3,r5,r4 + adds r14,r14,r4 @ r2|r7|r14 += #0|r3|r4 + adcs r7,r7,r3 + adc r2,r2,#0 + umull r4,r3,r5,r6 + adds r14,r14,r3 @ r2|r7|r14 += #0|#0|r3 + adcs r7,r7,#0 + adcs r2,r2,#0 + + bpl CPDO_muf_norm + + add r8,r8,#1 + b CPDO_muf_end + +CPDO_muf_norm: + adds r14,r14,r14 + adcs r7,r7,r7 + adcs r2,r2,r2 + +CPDO_muf_end: + cmp r8,#0x20000000 + bge CPDO_inf + cmp r8,#0xe0000000 + ble CPDO_zero_1 + stmia r0,{r1,r2,r7,r8} + b fastfpe_next + +CPDO_muf_extra: + cmp r7,#0x7fffffff @ was it the first? + bne CPDO_muf_extra_2nd @ no, so it was the second + cmp r8,#0x7fffffff @ yes, second too? + bne CPDO_muf_extra_1st @ no, only first + orr r3,r3,r4 @ if both inf -> inf, otherwise nan + eor r1,r1,r2 @ sign for the inf case + b CPDO_infnan_1 + +CPDO_muf_extra_1st: + cmp r3,#0 @ is it a nan? + bne CPDO_infnan_1 + cmp r8,#0x80000000 @ is the second 0? + beq CPDO_nan + eor r1,r1,r2 @ correct sign for inf + b CPDO_inf + +CPDO_muf_extra_2nd: + cmp r4,#0 @ is it a nan? + bne CPDO_infnan_2 + cmp r7,#0x80000000 @ is the first 0? + beq CPDO_nan + eor r1,r1,r2 @ correct sign for inf + b CPDO_inf + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_dvf +CPDO_dvf: + ldmia r1,{r1,r3,r5,r7} + ldmia r2,{r2,r4,r6,r8} + +CPDO_dvf_l: + cmp r7,#0x7fffffff + cmpne r8,#0x7fffffff + beq CPDO_dvf_extra + cmp r8,#0x80000000 + beq CPDO_dvf_by0 + + eor r1,r1,r2 + cmp r7,#0x80000000 + beq CPDO_zero_1 + + sub r8,r7,r8 + + mov r2,#0 + mov r7,#1 + + cmp r3,r4 + cmpeq r5,r6 + bcs CPDO_dvf_loop_ + + sub r8,r8,#1 + +CPDO_dvf_loop: + adds r5,r5,r5 + adcs r3,r3,r3 + bcs CPDO_dvf_anyway +CPDO_dvf_loop_: + subs r5,r5,r6 + sbcs r3,r3,r4 + bcs CPDO_dvf_okay + + adds r5,r5,r6 + adc r3,r3,r4 + adds r7,r7,r7 + adcs r2,r2,r2 + bcc CPDO_dvf_loop + b CPDO_dvf_end + +CPDO_dvf_anyway: + adcs r7,r7,r7 + adcs r2,r2,r2 + bcs CPDO_dvf_end + subs r5,r5,r6 + sbc r3,r3,r4 + b CPDO_dvf_loop + +CPDO_dvf_okay: + adcs r7,r7,r7 + adcs r2,r2,r2 + bcc CPDO_dvf_loop + +CPDO_dvf_end: + b CPDO_muf_end + +CPDO_dvf_by0: + cmp R7,#0x80000000 + beq CPDO_nan @ first also 0 -> nan + eor r1,r1,r2 @ otherwise calculatesign for inf + b CPDO_inf + +CPDO_dvf_extra: + cmp r7,#0x7fffffff @ was it the first? + bne CPDO_dvf_extra_2nd @ no, so it was the second + cmp r8,#0x7fffffff @ yes, second too? + bne CPDO_dvf_extra_1st @ no, only first + orrs r3,r3,r4 + beq CPDO_nan @ if both inf -> create nan + b CPDO_nan_12 @ otherwise keep nan + +CPDO_dvf_extra_1st: + eor r1,r1,r2 @ correct sign for inf + b CPDO_infnan_1 + +CPDO_dvf_extra_2nd: + cmp r4,#0 @ is it a nan? + bne CPDO_infnan_2 + eor r1,r1,r2 @ correct sign for zero + b CPDO_zero_1 + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_rdf +CPDO_rdf: + mov r3,r2 + ldmia r1,{r2,r4,r6,r8} + ldmia r3,{r1,r3,r5,r7} + b CPDO_dvf_l + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_rmf +CPDO_rmf: + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_mvf +CPDO_mvf: + ldmia r2,{r1,r2,r3,r4} + stmia r0,{r1,r2,r3,r4} + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_mnf +CPDO_mnf: + ldmia r2,{r1,r2,r3,r4} + eor r1,r1,#0x80000000 + stmia r0,{r1,r2,r3,r4} + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_abs +CPDO_abs: + ldmia r2,{r1,r2,r3,r4} + bic r1,r1,#0x80000000 + stmia r0,{r1,r2,r3,r4} + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_sqt +CPDO_sqt: + ldmia r2,{r1,r2,r3,r4} + cmp r1,#0 + bne CPDO_nan + cmp r4,#0x7fffffff + beq CPDO_store_1234 + + tst r4,r4,lsr#1 @carry=exponent bit 0 + bcc CPDO_sqt_exponenteven + adds r3,r3,r3 + adcs r2,r2,r2 @carry is needed in loop! +CPDO_sqt_exponenteven: + mov r4,r4,asr #1 + str r4,[r0,#12] + + mov r4,#0x80000000 + mov r5,#0 + sub r2,r2,#0x80000000 + + mov r8,#0x40000000 + mov r14,#0x80000000 + + mov r1,#1 + b CPDO_sqt_loop1_first +CPDO_sqt_loop1: + adds r3,r3,r3 + adcs r2,r2,r2 +CPDO_sqt_loop1_first: + add r6,r4,r8,lsr r1 @r7 const = r5 + bcs CPDO_sqt_loop1_1 + cmp r2,r6 + cmpeq r3,r5 @r5 for r7 + bcc CPDO_sqt_loop1_0 +CPDO_sqt_loop1_1: + orr r4,r4,r14,lsr r1 + subs r3,r3,r5 @r5 for r7 + sbc r2,r2,r6 +CPDO_sqt_loop1_0: + add r1,r1,#1 + cmp r1,#30 + ble CPDO_sqt_loop1 + + adds r3,r3,r3 + adcs r2,r2,r2 + bcs CPDO_sqt_between_1 + adds r7,r5,#0x80000000 + adc r6,r4,#0 + cmp r2,r6 + cmpeq r3,r7 + bcc CPDO_sqt_between_0 +CPDO_sqt_between_1: + orr r4,r4,#0x00000001 + subs r3,r3,r5 + sbc r2,r2,r4 + subs r3,r3,#0x80000000 + sbc r2,r2,#0 +CPDO_sqt_between_0: + mov r1,#0 + +CPDO_sqt_loop2: + adds r3,r3,r3 + adcs r2,r2,r2 + bcs CPDO_sqt_loop2_1 + adds r7,r5,r8,lsr r1 + adc r6,r4,#0 + cmp r2,r6 + cmpeq r3,r7 + bcc CPDO_sqt_loop2_0 +CPDO_sqt_loop2_1: + orr r5,r5,r14,lsr r1 + subs r3,r3,r5 + sbc r2,r2,r4 + subs r3,r3,r8,lsr r1 + sbc r2,r2,#0 +CPDO_sqt_loop2_0: + add r1,r1,#1 + cmp r1,#30 + ble CPDO_sqt_loop2 + + adds r3,r3,r3 + adcs r2,r2,r2 + bcs CPDO_sqt_after_1 + cmp r2,r6 + cmpeq r3,r7 + bcc CPDO_sqt_after_0 +CPDO_sqt_after_1: + orr r5,r5,#0x00000001 +CPDO_sqt_after_0: + + mov r1,#0 + stmia r0,{r1,r4,r5} + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_rnd +CPDO_rnd: + ldmia r2,{r1,r2,r3,r5} + bl CPDO_rnd_core + +CPDO_rnd_store: + stmia r0,{r1,r2,r3,r5} + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDO_rnd_core +CPDO_rnd_core: + and r4,r4,#0x00000060 + add pc,pc,r4,lsr#3 + mov r0,r0 + b CPDO_rnd_N + b CPDO_rnd_P + b CPDO_rnd_M + b CPDO_rnd_Z + +CPDO_rnd_N: + cmp r5,#-1 + blt CPDO_rnd_zero + cmp r5,#63 + movge pc,r14 + mov r4,#0x40000000 + cmp r5,#31 + bge CPDO_rnd_N_2 + + adds r2,r2,r4,lsr r5 + bcc CPDO_rnd_end + b CPDO_rnd_end_norm + +CPDO_rnd_N_2: +CPDO_rnd_P_2: + sub r6,r5,#32 + adds r3,r3,r4,ror r6 @ror ist needed to handle a -1 correctly + adcs r2,r2,#0 + bcc CPDO_rnd_end + b CPDO_rnd_end_norm + +CPDO_rnd_P: + tst r1,#0x80000000 + bne CPDO_rnd_M_entry +CPDO_rnd_P_entry: + cmp r5,#0 + blt CPDO_rnd_P_small + cmp r5,#63 + movge pc,r14 + mov r4,#0x7fffffff + cmp r5,#32 + bge CPDO_rnd_P_2 + + adds r3,r3,#0xffffffff + adcs r2,r2,r4,lsr r5 + bcc CPDO_rnd_end + b CPDO_rnd_end_norm + +CPDO_rnd_P_small: + cmp r5,#0x80000000 + moveq pc,r14 + b CPDO_rnd_one + +CPDO_rnd_M: + tst r1,#0x80000000 + bne CPDO_rnd_P_entry +CPDO_rnd_M_entry: + cmp r5,#0 + blt CPDO_rnd_zero + cmp r5,#63 + movge pc,r14 + + b CPDO_rnd_end + +CPDO_rnd_Z: + cmp r5,#0 + blt CPDO_rnd_zero + cmp r5,#63 + movge pc,r14 + b CPDO_rnd_end + +CPDO_rnd_end_norm: + add r5,r5,#1 + movs r2,r2,rrx + mov r3,r3,rrx +CPDO_rnd_end: + rsbs r4,r5,#31 + bmi CPDO_rnd_end_2 + mov r3,#0 + mov r2,r2,lsr r4 + mov r2,r2,lsl r4 + mov pc,r14 + +CPDO_rnd_end_2: + rsb r4,r5,#63 + mov r3,r3,lsr r4 + mov r3,r3,lsl r4 + mov pc,r14 + +CPDO_rnd_one: + mov r2,#0x80000000 + mov r3,#0 + mov r5,#0 + mov pc,r14 + +CPDO_rnd_zero: + mov r1,#0 + mov r2,#0 + mov r3,#0 + mov r5,#0x80000000 + mov pc,r14 + +/*---------------------------------------------------------------------------*/ diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/fastfpe/CPDT.S linux-88fxx81/arch/arm/fastfpe/CPDT.S --- linux-2.6.12.6-armeb/arch/arm/fastfpe/CPDT.S 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/fastfpe/CPDT.S 2006-08-30 19:27:36.000000000 +0930 @@ -0,0 +1,430 @@ +/* +The FP structure has 4 words reserved for each register, the first is used just +for the sign in bit 31, the second and third are for the mantissa (unsigned +integer, high 32 bit first) and the fourth is the exponent (signed integer). +The mantissa is always normalized. + +If the exponent is 0x80000000, that is the most negative value, the number +represented is 0 and both mantissa words are also 0. + +If the exponent is 0x7fffffff, that is the biggest positive value, the number +represented is infinity if the high 32 mantissa bit are also 0, otherwise it is +a NaN. The low 32 mantissa bit are 0 if the number represented is infinity. + +Decimal and packed decimal numbers are not supported yet. +*/ + +/*---------------------------------------------------------------------------*/ + + .globl CPDT_load_single +CPDT_load_single: + ldr r1,[r6] + + and r2,r1,#0x80000000 @ r2 = sign + + mov r5,r1,lsr#23 + bics r5,r5,#0x100 + beq CPDT_ls_e0 @ exponent = 0; zero/denormalized + teq r5,#255 + beq CPDT_ls_e255 @ exponent = 255; infinity/NaN + + sub r5,r5,#127 @ r5 = exponent, remove normalized bias + + mov r3,r1,lsl#8 + orr r3,r3,#0x80000000 + mov r4,#0 @ r3,r4 = mantissa + + stmia r0,{r2-r5} + b fastfpe_next + +CPDT_ls_e0: + movs r3,r1,lsl#9 + beq CPDT_load_zero + + mov r5,#-127 + +CPDT_ls_e0_norm: + tst r3,#0x80000000 + subeq r5,r5,#1 + moveq r3,r3,lsl#1 + beq CPDT_ls_e0_norm + + mov r4,#0 + stmia r0,{r2-r5} + b fastfpe_next + +CPDT_ls_e255: + mov r3,r1,lsl#9 + mov r4,#0 + mov r5,#0x7fffffff + stmia r0,{r2-r5} + b fastfpe_next + +CPDT_load_zero: + mov r3,#0 + mov r4,#0 + mov r5,#0x80000000 + stmia r0,{r2-r5} + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDT_load_double +CPDT_load_double: + ldr r1,[r6] + ldr r6,[r6,#4] + + and r2,r1,#0x80000000 @ r2 = sign + + mov r5,r1,lsr#20 + bics r5,r5,#0x800 + beq CPDT_ld_e0 @ exponent = 0; zero/denormalized + add r4,r5,#1 + teq r4,#2048 + beq CPDT_ld_e2047 @ exponent = 2047; infinity/NaN + + add r5,r5,#1 + sub r5,r5,#1024 @ r5 = exponent, remove normalized bias + + mov r3,r1,lsl#11 + orr r3,r3,#0x80000000 + orr r3,r3,r6,lsr #21 + mov r4,r6,lsl#11 @ r3,r4 = mantissa + + stmia r0,{r2-r5} + b fastfpe_next + +CPDT_ld_e0: + mov r3,r1,lsl#12 + orr r3,r3,r6,lsr#20 + movs r4,r6,lsl#12 + teqeq r3,#0 + beq CPDT_load_zero + + mov r5,#1 + sub r5,r5,#1024 + +CPDT_ld_e0_norm: + tst r3,#0x80000000 + subeq r5,r5,#1 + moveqs r4,r4,lsl#1 + adceq r3,r3,r3 + beq CPDT_ld_e0_norm + + stmia r0,{r2-r5} + b fastfpe_next + +CPDT_ld_e2047: + mov r3,r1,lsl#12 + orr r3,r3,r6,lsr#1 + bic r6,r6,#0x80000000 + orr r3,r3,r6 @ to get all fraction bits ! + mov r4,#0 + mov r5,#0x7fffffff + stmia r0,{r2-r5} + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDT_load_extended +CPDT_load_extended: + ldr r1,[r6] + ldr r3,[r6,#4] + ldr r4,[r6,#8] + + and r2,r1,#0x80000000 + bics r5,r1,#0x80000000 + beq CPDT_le_e0 + add r1,r5,#1 + teq r4,#32768 + beq CPDT_le_e32767 + + add r5,r5,#1 + sub r5,r5,#16384 + + stmia r0,{r2-r5} + b fastfpe_next + +CPDT_le_e0: + teq r3,#0 + teqeq r4,#0 + beq CPDT_load_zero + + mov r5,#2 + sub r5,r5,#16384 + b CPDT_ld_e0_norm + +CPDT_le_e32767: + mov r3,r3,lsl#1 + orr r3,r3,r4,lsr#1 + bic r4,r4,#0x80000000 + orr r3,r3,r4 + mov r5,#0x7fffffff + stmia r0,{r2-r5} + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDT_load_decimal +CPDT_load_decimal: + + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDT_store_single +CPDT_store_single: + ldmia r0,{r1-r4} + + cmp r4,#-127 + ble CPDT_ss_e0 + cmp r4,#128 + bge CPDT_ss_e255 + + adds r2,r2,#1<<7 @ round to nearest + bcs CPDT_ss_rnd_ovfl @ very very seldom taken + +CPDT_ss_store: + add r4,r4,#127 + orr r1,r1,r4,lsl#23 + + bic r2,r2,#0x80000000 + orr r1,r1,r2,lsr#8 + + str r1,[r6] + b fastfpe_next + +CPDT_ss_rnd_ovfl: + add r4,r4,#1 + cmp r4,#128 + bge CPDT_ss_e255 + + mov r2,#0x80000000 + mov r3,#0 + b CPDT_ss_store + +CPDT_ss_e0: + cmp r4,#-150 + ble CPDT_ss_zero + + add r4,r4,#126 +CPDT_ss_unnormalize: + mov r2,r2,lsr#1 + adds r4,r4,#1 + bne CPDT_ss_unnormalize + + orr r1,r1,r2,lsr#8 + +CPDT_ss_zero: + str r1,[r6] + b fastfpe_next + +CPDT_ss_e255: + cmp r4,#0x7fffffff + bne CPDT_ss_inf + cmp r2,#0 + beq CPDT_ss_inf + + orr r1,r1,#0x00200000 @ for safety so that it is not INF + orr r1,r1,r2,lsr#9 @ get highest bit of mantissa + +CPDT_ss_inf: + orr r1,r1,#0x7f000000 + orr r1,r1,#0x00800000 + str r1,[r6] + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDT_store_double +CPDT_store_double: + ldmia r0,{r1-r4} + + cmp r4,#1024 @ this check has to be first, or + bge CPDT_sd_e2047 @ overflow can occur on second ! + add r0,r4,#3 + cmp r0,#-1023+3 @ cmp with -1023 + ble CPDT_sd_e0 + + adds r3,r3,#1<<10 @ round to nearest + adcs r2,r2,#0 + bcs CPDT_sd_rnd_ovfl @ very very seldom taken + +CPDT_sd_store: + sub r4,r4,#1 + add r4,r4,#1024 + orr r1,r1,r4,lsl#20 + + bic r2,r2,#0x80000000 + orr r1,r1,r2,lsr#11 + + mov r2,r2,lsl#21 + orr r2,r2,r3,lsr#11 + + stmia r6,{r1,r2} + b fastfpe_next + +CPDT_sd_rnd_ovfl: + add r4,r4,#1 + cmp r4,#1024 + bge CPDT_sd_e2047 + + mov r2,#0x80000000 + mov r3,#0 + b CPDT_sd_store + +CPDT_sd_e0: + add r0,r4,#1075-1024 + cmp r0,#-1024 + ble CPDT_sd_zero + + add r4,r4,#1024 + sub r4,r4,#2 +CPDT_sd_unnormalize: + movs r2,r2,lsr#1 + mov r3,r3,rrx + adds r4,r4,#1 + bne CPDT_sd_unnormalize + + orr r1,r1,r2,lsr#11 + mov r2,r2,lsl#21 + orr r2,r2,r3,lsr#11 + + stmia r6,{r1,r2} + b fastfpe_next + +CPDT_sd_zero: + mov r2,#0 + stmia r6,{r1,r2} + b fastfpe_next + +CPDT_sd_e2047: + cmp r4,#0x7fffffff + bne CPDT_sd_inf + cmp r2,#0 + beq CPDT_sd_inf + + orr r1,r1,#0x00040000 @ for safety so that it is not INF + orr r1,r1,r2,lsr#12 @ get highest bit of mantissa + +CPDT_sd_inf: + orr r1,r1,#0x7f000000 + orr r1,r1,#0x00f00000 + stmia r6,{r1,r2} + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDT_store_extended +CPDT_store_extended: + ldmia r0,{r1-r4} + + cmp r4,#16384 @ this check has to be first, or + bge CPDT_se_e32767 @ overflow can occur with second ! + add r0,r4,#63 + cmp r0,#-16383+63 + ble CPDT_se_e0 + + sub r4,r4,#1 + add r4,r4,#16384 + orr r1,r1,r4 + + stmia r6,{r1-r3} + b fastfpe_next + +CPDT_se_e0: + add r0,r4,#16446-16384 + cmp r0,#-16384 + ble CPDT_se_zero + + add r4,r4,#16384 + sub r4,r4,#2 +CPDT_se_unnormalize: + movs r2,r2,lsr#1 + mov r3,r3,rrx + adds r4,r4,#1 + bne CPDT_se_unnormalize + + stmia r6,{r1-r3} + b fastfpe_next + +CPDT_se_zero: + mov r2,#0 + mov r3,#0 + stmia r6,{r1-r3} + b fastfpe_next + +CPDT_se_e32767: + cmp r4,#0x7fffffff + bne CPDT_se_inf + cmp r2,#0 + beq CPDT_se_inf + + mov r2,r2,lsl#1 + orr r2,r2,#0x20000000 + +CPDT_se_inf: + orr r1,r1,#0x00007f00 + orr r1,r1,#0x000000ff + stmia r6,{r1-r3} + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDT_store_decimal +CPDT_store_decimal: + + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDT_sfm +CPDT_sfm: + add r2,r10,r0,lsr#8 + ldr r4,[r2,#0] + ldr r3,[r2,#4] + bic r3,r3,#0x80000000 + orr r3,r3,r4 + str r3,[r6],#4 + ldr r3,[r2,#8] + str r3,[r6],#4 + ldr r3,[r2,#12] + str r3,[r6],#4 + + add r0,r0,#1<<12 + and r0,r0,#7<<12 + subs r1,r1,#1 + bne CPDT_sfm + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPDT_lfm +CPDT_lfm: + add r2,r10,r0,lsr#8 + ldr r4,[r6],#4 + and r3,r4,#0x80000000 + str r3,[r2,#0] + ldr r3,[r6],#4 + str r3,[r2,#8] + ldr r3,[r6],#4 + str r3,[r2,#12] + + cmp r3,#0x80000000 @ does the exp indicate zero? + biceq r4,r4,#0x80000000 @ if so, indicate 'denormalized' + beq CPDT_lfm_storer4 + cmp r3,#0x7fffffff @ does the exp indicate inf or NaN? + biceq r4,r4,#0x80000000 @ if so, indicate 'denormalized' + beq CPDT_lfm_storer4 + orrne r4,r4,#0x80000000 @ otherwise, set normalized bit + +CPDT_lfm_storer4: + str r4,[r2,#4] + + add r0,r0,#1<<12 + and r0,r0,#7<<12 + subs r1,r1,#1 + bne CPDT_lfm + b fastfpe_next + +/*---------------------------------------------------------------------------*/ diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/fastfpe/CPRT.S linux-88fxx81/arch/arm/fastfpe/CPRT.S --- linux-2.6.12.6-armeb/arch/arm/fastfpe/CPRT.S 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/fastfpe/CPRT.S 2006-08-30 19:27:36.000000000 +0930 @@ -0,0 +1,185 @@ +/* +The FP structure has 4 words reserved for each register, the first is used +just +for the sign in bit 31, the second and third are for the mantissa (unsigned +integer, high 32 bit first) and the fourth is the exponent (signed integer). +The mantissa is always normalized. + +If the exponent is 0x80000000, that is the most negative value, the number +represented is 0 and both mantissa words are also 0. + +If the exponent is 0x7fffffff, that is the biggest positive value, the +number +represented is infinity if the high 32 mantissa bit are also 0, otherwise it +is +a NaN. The low 32 mantissa bit are 0 if the number represented is infinity. + +Decimal and packed decimal numbers are not supported yet. +*/ + +/*---------------------------------------------------------------------------*/ + + .text + .globl CPRT_flt +CPRT_flt: + add r0,r13,r0,lsr#10 + ldr r2,[r0] + mov r3,#0 + cmp r2,#0 + beq CPRT_flt_zero + + ands r0,r2,#0x80000000 + rsbne r2,r2,#0 + mov r4,#31 + + cmp r2,#0x00010000 + movcc r2,r2,lsl#16 + subcc r4,r4,#16 + + cmp r2,#0x01000000 + movcc r2,r2,lsl#8 + subcc r4,r4,#8 + + cmp r2,#0x10000000 + movcc r2,r2,lsl#4 + subcc r4,r4,#4 + + cmp r2,#0x40000000 + movcc r2,r2,lsl#2 + subcc r4,r4,#2 + + cmp r2,#0x80000000 + movcc r2,r2,lsl#1 + subcc r4,r4,#1 + + stmia r1,{r0,r2,r3,r4} + b fastfpe_next + +CPRT_flt_zero: + mov r0,#0 + mov r4,#0x80000000 + stmia r1,{r0,r2,r3,r4} + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPRT_fix +CPRT_fix: + ldmia r2,{r1,r2,r3,r5} + bl CPDO_rnd_core + +CPRT_back: + add r0,r13,r0,lsr#10 + cmp r5,#0 + blt CPRT_int_zero + cmp r5,#30 + bgt CPRT_overflow + + rsb r5,r5,#31 + mov r2,r2,lsr r5 + tst r1,#0x80000000 + rsbne r2,r2,#0 + + str r2,[r0] + b fastfpe_next + +CPRT_int_zero: + mov r2,#0 + str r2,[r0] + b fastfpe_next + +CPRT_overflow: + mov r2,#0x80000000 + tst r1,#0x80000000 + subeq r2,r2,#1 + str r2,[r0] + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPRT_wfs +CPRT_wfs: + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPRT_rfs +CPRT_rfs: + add r0,r13,r0,lsr#10 + mov r1,#0x02000000 @ Software Emulation, not Acorn FPE + str r1,[r0] + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPRT_cmf +CPRT_cmf: + ldmia r1,{r1,r3,r5,r7} + ldmia r2,{r2,r4,r6,r8} + +CPRT_cmf_e: + ldr r0,[r13,#16*4] + + cmp r7,#0x7fffffff + bic r0,r0,#0xf0000000 + + cmpeq r3,#0xffffffff + beq CPRT_cmf_unordered + cmp r8,#0x7fffffff + cmpeq r4,#0xffffffff + beq CPRT_cmf_unordered + + cmp r1,r2 + beq CPRT_cmf_equalsign + b CPRT_cmf_sign + +CPRT_cmf_equalsign: + cmp r7,r8 + beq CPRT_cmf_equalexponent + bgt CPRT_cmf_sign + b CPRT_cmf_signb + +CPRT_cmf_equalexponent: + cmp r3,r4 + cmpeq r5,r6 + beq CPRT_cmf_equal + bhi CPRT_cmf_sign + b CPRT_cmf_signb + +CPRT_cmf_sign: + cmp r7,#0x80000000 @ (0.0 == -0.0)? + cmpeq r7,r8 + beq CPRT_cmf_equal + tst r1,#0x80000000 + orreq r0,r0,#0x20000000 + orrne r0,r0,#0x80000000 + str r0,[r13,#16*4] + b fastfpe_next + +CPRT_cmf_signb: + tst r1,#0x80000000 + orrne r0,r0,#0x20000000 + orreq r0,r0,#0x80000000 + str r0,[r13,#16*4] + b fastfpe_next + +CPRT_cmf_equal: + orr r0,r0,#0x60000000 + str r0,[r13,#16*4] + b fastfpe_next + +CPRT_cmf_unordered: + orr r0,r0,#0x10000000 + str r0,[r13,#16*4] + b fastfpe_next + +/*---------------------------------------------------------------------------*/ + + .globl CPRT_cnf +CPRT_cnf: + ldmia r1,{r1,r3,r5,r7} + ldmia r2,{r2,r4,r6,r8} + eor r2,r2,#0x80000000 + b CPRT_cmf_e + +/*---------------------------------------------------------------------------*/ diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/fastfpe/entry.S linux-88fxx81/arch/arm/fastfpe/entry.S --- linux-2.6.12.6-armeb/arch/arm/fastfpe/entry.S 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/fastfpe/entry.S 2006-08-30 19:27:36.000000000 +0930 @@ -0,0 +1,294 @@ +/* +At entry the registers contain the following information: + +r14 return address for undefined exception return +r9 return address for return from exception +r13 user registers on stack, offset 0 up to offset 4*15 contains + registers r0..15, then the psr +r10 FP workspace 35 words (init, reg[8][4], fpsr, fpcr) + +*/ + +/*---------------------------------------------------------------------------*/ + + .data +fp_const: + .word 0, 0x00000000, 0, 0x80000000 @ 0 + .word 0, 0x80000000, 0, 0 @ 1 + .word 0, 0x80000000, 0, 1 @ 2 + .word 0, 0xc0000000, 0, 1 @ 3 + .word 0, 0x80000000, 0, 2 @ 4 + .word 0, 0xa0000000, 0, 2 @ 5 + .word 0, 0x80000000, 0, -1 @ 0.5 + .word 0, 0xa0000000, 0, 3 @ 10 +fp_undef: + .word 0 +fp_cond: + .word 0xf0f0 @ eq + .word 0x0f0f @ ne + .word 0xcccc @ cs + .word 0x3333 @ cc + .word 0xff00 @ mi + .word 0x00ff @ pl + .word 0xaaaa @ vs + .word 0x5555 @ vc + .word 0x0c0c @ hi + .word 0xf3f3 @ ls + .word 0xaa55 @ ge + .word 0x55aa @ lt + .word 0x0a05 @ gt + .word 0xf5fa @ le + .word 0xffff @ al + .word 0x0000 @ nv + +/*---------------------------------------------------------------------------*/ + + .text + .globl fastfpe_enter +fastfpe_enter: + ldr r4,=fp_undef + str r14,[r4] @ to free one register + add r10,r10,#4 @ to make the code simpler + mov r4, r0 @ r4=trapped instruction + and r1,r4,#0x00000f00 @ r1=coprocessor << 8 +next_enter: + cmp r1,#1<<8 @ copro 1 ? + beq copro_1 + cmp r1,#2<<8 + movne pc,r14 + +copro_2: + and r1,r4,#0x0f000000 + cmp r1,#0x0c000000 @ CPDT with post indexing + cmpne r1,#0x0d000000 @ CPDT with pre indexing + beq CPDT_M_enter + mov pc,r14 + +copro_1: + and r1,r4,#0x0f000000 + cmp r1,#0x0e000000 @ CPDO + beq CPDO_CPRT_enter + cmp r1,#0x0c000000 @ CPDT with post indexing + cmpne r1,#0x0d000000 @ CPDT with pre indexing + beq CPDT_1_enter + mov pc,r14 + +/*---------------------------------------------------------------------------*/ + + .globl fastfpe_next +fastfpe_next: + ldr r5,[r13,#60] +next_after_cond: +__x1: + ldrt r4,[r5],#4 + + ldr r0,=fp_cond @ check condition of next instruction + ldr r1,[r13,#64] @ psr containing flags + mov r2,r4,lsr#28 + mov r1,r1,lsr#28 + ldr r0,[r0,r2,lsl#2] + mov r0,r0,lsr r1 + tst r0,#1 + beq next_after_cond @ must not necessarily have been an + @ FP instruction ! + and r1,r4,#0x0f000000 @ Test for copro instruction + cmp r1,#0x0c000000 + rsbgts r0,r1,#0x0e000000 @ cmpgt #0x0e000000,r1 + movlt pc,r9 @ next is no copro instruction, return + + ands r1,r4,#0x00000f00 @ r1 = coprocessor << 8 + cmpne r1,#3<<8 + movge pc,r9 @ copro = 0 or >=3, return + + str r5,[r13,#60] @ save updated pc + b next_enter + +/*---------------------------------------------------------------------------*/ + +undefined: + ldr r4,=fp_undef + ldr pc,[r4] + +/*---------------------------------------------------------------------------*/ + +CPDT_1_enter: + and r5,r4,#0x000f0000 @ r5=base register number << 16 + ldr r6,[r13,r5,lsr#14] @ r6=base address + cmp r5,#0x000f0000 @ base register = pc ? + addeq r6,r6,#4 + and r7,r4,#0x000000ff @ r7=offset value + + tst r4,#0x00800000 @ up or down? + addne r7,r6,r7,lsl#2 + subeq r7,r6,r7,lsl#2 @ r6=base address +/- offset + tst r4,#0x01000000 @ preindexing ? + movne r6,r7 + tst r4,#0x00200000 @ write back ? + cmpne r5,#0x000f0000 @ base register = pc ? + strne r7,[r13,r5,lsr#14] + + and r0,r4,#0x00007000 @ r0=fp register number << 12 + add r0,r10,r0,lsr#8 @ r0=address of fp register + mov r1,#0 + tst r4,#0x00008000 + orrne r1,r1,#1 @ T0 + tst r4,#0x00400000 + orrne r1,r1,#2 @ T1 + tst r4,#0x00100000 + orrne r1,r1,#4 @ L/S + + add pc,pc,r1,lsl#2 + mov r0,r0 + b CPDT_store_single @ these functions get + b CPDT_store_double @ r0=address of fp register + b CPDT_store_extended @ r6=address of data + b undefined @ CPDT_store_decimal + b CPDT_load_single + b CPDT_load_double + b CPDT_load_extended + b undefined @ CPDT_load_decimal + +/*---------------------------------------------------------------------------*/ + +CPDT_M_enter: + and r5,r4,#0x000f0000 @ r5=base register number << 16 + ldr r6,[r13,r5,lsr#14] @ r6=base address + cmp r5,#0x000f0000 @ base register = pc ? + addeq r6,r6,#4 + and r7,r4,#0x000000ff @ r7=offset value + + tst r4,#0x00800000 @ up or down? + addne r7,r6,r7,lsl#2 + subeq r7,r6,r7,lsl#2 @ r7=base address +/- offset + tst r4,#0x01000000 @ preindexing ? + movne r6,r7 + tst r4,#0x00200000 @ write back ? + cmpne r5,#0x000f0000 @ base register = pc ? + strne r7,[r13,r5,lsr#14] + + and r0,r4,#0x00007000 @ r0=fp register number << 12 + and r1,r4,#0x00008000 + mov r1,r1,lsr#15 @ N0 + and r2,r4,#0x00400000 + orrs r1,r1,r2,lsr#21 @ N1 + addeq r1,r1,#4 @ r1=register count + + tst r4,#0x00100000 @ load/store + beq CPDT_sfm + b CPDT_lfm + +/*---------------------------------------------------------------------------*/ + +CPDO_CPRT_enter: + tst r4,#0x00000010 + bne CPRT_enter + + and r0,r4,#0x00007000 + add r0,r10,r0,lsr#8 @ r0=address of Fd + and r1,r4,#0x00070000 + add r1,r10,r1,lsr#12 @ r1=address of Fn + tst r4,#0x00000008 + bne CPDO_const + and r2,r4,#0x00000007 + add r2,r10,r2,lsl#4 @ r2=address of Fm + +CPDO_constback: + and r3,r4,#0x00f00000 + tst r4,#0x00008000 + orrne r3,r3,#0x01000000 + + add pc,pc,r3,lsr#18 + mov r0,r0 + b CPDO_adf + b CPDO_muf + b CPDO_suf + b CPDO_rsf + b CPDO_dvf + b CPDO_rdf + b undefined + b undefined + b undefined @ CPDO_rmf + b CPDO_muf + b CPDO_dvf + b CPDO_rdf + b undefined + b undefined + b undefined + b undefined + b CPDO_mvf + b CPDO_mnf + b CPDO_abs + b CPDO_rnd + b CPDO_sqt + b undefined + b undefined + b undefined + b undefined + b undefined + b undefined + b undefined + b undefined + b undefined + b CPDO_rnd + b fastfpe_next + +CPDO_const: + ldr r2,=fp_const + and r3,r4,#0x00000007 + add r2,r2,r3,lsl#4 + b CPDO_constback + +/*---------------------------------------------------------------------------*/ + +CPRT_enter: + and r0,r4,#0x0000f000 @ r0=Rd<<12 + and r1,r4,#0x00070000 + add r1,r10,r1,lsr#12 @ r1=address of Fn + tst r4,#0x00000008 + bne CPRT_const + and r2,r4,#0x00000007 + add r2,r10,r2,lsl#4 @ r2=address of Fm + +CPRT_constback: + and r3,r4,#0x00f00000 + + add pc,pc,r3,lsr#18 + mov r0,r0 + b CPRT_flt + b CPRT_fix + b CPRT_wfs + b CPRT_rfs + b undefined + b undefined + b undefined + b undefined + b undefined + b CPRT_cmf + b undefined + b CPRT_cnf + b undefined + b CPRT_cmf + b undefined + b CPRT_cnf + +CPRT_const: + ldr r2,=fp_const + and r3,r4,#0x00000007 + add r2,r2,r3,lsl#4 + b CPRT_constback + +/*---------------------------------------------------------------------------*/ + + @ The fetch of the next instruction to emulate could fault + + .section .fixup,"ax" + .align +__f1: + mov pc,r9 + .previous + .section __ex_table,"a" + .align 3 + .long __x1,__f1 + .previous + +/*---------------------------------------------------------------------------*/ diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/fastfpe/Makefile linux-88fxx81/arch/arm/fastfpe/Makefile --- linux-2.6.12.6-armeb/arch/arm/fastfpe/Makefile 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/fastfpe/Makefile 2006-08-30 19:27:36.000000000 +0930 @@ -0,0 +1,14 @@ +# +# linux/arch/arm/fastfpe/Makefile +# +# Copyright (C) Peter Teichmann +# + +obj-y := +obj-m := +obj-n := +obj- := + +fastfpe-objs := module.o entry.o CPDO.o CPRT.o CPDT.o + +obj-$(CONFIG_FPE_FASTFPE) += fastfpe.o diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/fastfpe/module.c linux-88fxx81/arch/arm/fastfpe/module.c --- linux-2.6.12.6-armeb/arch/arm/fastfpe/module.c 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/fastfpe/module.c 2006-08-30 19:27:36.000000000 +0930 @@ -0,0 +1,62 @@ +/* + Fast Floating Point Emulator + (c) Peter Teichmann + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include +#include +#include +#include +#include +#include +#include + +#ifndef MODULE +#define kern_fp_enter fp_enter + +extern char fpe_type[]; +#endif + +static void (*orig_fp_enter)(void); /* old kern_fp_enter value */ +extern void (*kern_fp_enter)(void); /* current FP handler */ +extern void fastfpe_enter(void); /* forward declarations */ + +static int __init fpe_init(void) +{ + if (fpe_type[0] && strcmp(fpe_type, "fastfpe")) + return 0; + + printk("Fast Floating Point Emulator V0.9 (c) Peter Teichmann.\n"); + + /* Save pointer to the old FP handler and then patch ourselves in */ + orig_fp_enter = kern_fp_enter; + kern_fp_enter = fastfpe_enter; + + return 0; +} + +static void __exit fpe_exit(void) +{ + /* Restore the values we saved earlier. */ + kern_fp_enter = orig_fp_enter; +} + +module_init(fpe_init); +module_exit(fpe_exit); + +MODULE_AUTHOR("Peter Teichmann "); +MODULE_DESCRIPTION("Fast floating point emulator with full precision"); diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/Kconfig linux-88fxx81/arch/arm/Kconfig --- linux-2.6.12.6-armeb/arch/arm/Kconfig 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/Kconfig 2007-02-01 08:33:30.000000000 +1030 @@ -7,6 +7,7 @@ config ARM bool + select RTC_LIB default y help The ARM series is a line of low-power-consumption RISC chip designs @@ -120,6 +121,10 @@ select ARM_AMBA select ICST525 +config ARCH_MV88fxx81 + bool "mv88fxx81" + select PCI + config ARCH_IOP3XX bool "IOP3xx-based" select PCI @@ -204,6 +209,8 @@ endchoice +source "arch/arm/mach-mv88fxx81/LSP/Kconfig" + source "arch/arm/mach-clps711x/Kconfig" source "arch/arm/mach-epxa10db/Kconfig" @@ -277,7 +284,7 @@ default y config PCI - bool "PCI support" if ARCH_INTEGRATOR_AP + bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_MV88fxx81 help Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other stuff inside @@ -343,6 +350,47 @@ Say Y here if you are building a kernel for a desktop, embedded or real-time system. Say N if you are unsure. +config AEABI + bool "Use the ARM EABI to compile the kernel" + help + This option allows for the kernel to be compiled using the latest + ARM ABI (aka EABI). This is only useful if you are using a user + space environment that is also compiled with EABI. + + Since there are major incompatibilities between the legacy ABI and + EABI, especially with regard to structure member alignment, this + option also changes the kernel syscall calling convention to + disambiguate both ABIs and allow for backward compatibility support + (selected with CONFIG_OABI_COMPAT) + + To use this you need GCC version 4.0.0 or later. + +config OABI_COMPAT + bool "Allow old ABI binaries to run with this kernel" + depends on AEABI && EXPERIMENTAL + default y + help + This option preserves the old syscall interface along with the + new (ARM EABI) one. It also provides a compatibility layer to + intercept syscalls that have structure arguments which layout + in memory differs between the legacy ABI and the new ARM EABI + (only for non "thumb" binaries). This option adds a tiny + overhead to all syscalls and produces a slightly larger kernel. + If you know you'll be using only pure EABI user space then you + can say N here. If this option is not selected and you attempt + to execute a legacy ABI binary then the result will be + UNPREDICTABLE (in fact it can be predicted that it won't work + at all). If in doubt say Y. + +config REORDER + bool "Function reordering" + default n + help + This option enables the toolchain to reorder functions for a more + optimal TLB/Icache usage. If you have pretty much any version of binutils, + this can increase your kernel build time by roughly one minute. + + config DISCONTIGMEM bool default (ARCH_LH7A40X && !LH7A40X_CONTIGMEM) @@ -358,7 +406,7 @@ ARCH_EBSA285 || ARCH_IMX || ARCH_INTEGRATOR || \ ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ - ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE + ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || ARCH_MV88fxx81 help If you say Y here, the LEDs on your machine will be used to provide useful information about your current system status. @@ -372,7 +420,7 @@ config LEDS_TIMER bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ - MACH_OMAP_H2 || MACH_OMAP_PERSEUS2 + MACH_OMAP_H2 || MACH_OMAP_PERSEUS2 || ARCH_MV88fxx81 depends on LEDS default y if ARCH_EBSA110 help @@ -526,6 +574,7 @@ config FPE_NWFPE bool "NWFPE math emulation" + depends on !AEABI || OABI_COMPAT ---help--- Say Y to include the NWFPE floating point emulator in the kernel. This is necessary to run most binaries. Linux does not currently @@ -549,7 +598,7 @@ config FPE_FASTFPE bool "FastFPE math emulation (EXPERIMENTAL)" - depends on !CPU_32v3 && EXPERIMENTAL + depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL ---help--- Say Y here to include the FAST floating point emulator in the kernel. This is an experimental much faster emulator which now also has full @@ -573,6 +622,15 @@ Say N if your target does not have VFP hardware. +config VFP_RUN_FAST_MODE + bool "VFP run fast mode" + depends on !VFP + help + Say Y to activate run-fast mode of the VFP. This mode + enables the CPU in run-fast-mode only and disables lazy + context switch (ie. every context switch, the CPU swaps in/out + the VFP registers and control). + endmenu menu "Userspace binary formats" @@ -709,6 +767,8 @@ source "drivers/isdn/Kconfig" +source "drivers/telephony/Kconfig" + # input before char - char/joystick depends on it. As does USB. source "drivers/input/Kconfig" @@ -717,10 +777,16 @@ source "drivers/i2c/Kconfig" -#source "drivers/l3/Kconfig" +source "drivers/spi/Kconfig" + +source "drivers/w1/Kconfig" + +source "drivers/hwmon/Kconfig" source "drivers/misc/Kconfig" +source "drivers/leds/Kconfig" + source "drivers/media/Kconfig" source "drivers/video/Kconfig" @@ -731,6 +797,8 @@ source "drivers/mmc/Kconfig" +source "drivers/rtc/Kconfig" + endmenu source "fs/Kconfig" diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/armksyms.c linux-88fxx81/arch/arm/kernel/armksyms.c --- linux-2.6.12.6-armeb/arch/arm/kernel/armksyms.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/armksyms.c 2006-08-30 20:38:04.000000000 +0930 @@ -37,6 +37,16 @@ extern void __umodsi3(void); extern void __do_div64(void); +extern void __aeabi_idiv(void); +extern void __aeabi_idivmod(void); +extern void __aeabi_lasr(void); +extern void __aeabi_llsl(void); +extern void __aeabi_llsr(void); +//extern void __aeabi_lmul(void); +extern void __aeabi_uidiv(void); +extern void __aeabi_uidivmod(void); +//extern void __aeabi_ulcmp(void); + extern void fpundefinstr(void); extern void fp_enter(void); @@ -141,6 +151,18 @@ EXPORT_SYMBOL(__umodsi3); EXPORT_SYMBOL(__do_div64); +#ifdef CONFIG_AEABI +EXPORT_SYMBOL(__aeabi_idiv); +EXPORT_SYMBOL(__aeabi_idivmod); +EXPORT_SYMBOL(__aeabi_lasr); +EXPORT_SYMBOL(__aeabi_llsl); +EXPORT_SYMBOL(__aeabi_llsr); +//EXPORT_SYMBOL(__aeabi_lmul); +EXPORT_SYMBOL(__aeabi_uidiv); +EXPORT_SYMBOL(__aeabi_uidivmod); +//EXPORT_SYMBOL(__aeabi_ulcmp); +#endif + /* bitops */ EXPORT_SYMBOL(_set_bit_le); EXPORT_SYMBOL(_test_and_set_bit_le); @@ -173,3 +195,10 @@ EXPORT_SYMBOL(sys_open); EXPORT_SYMBOL(sys_exit); EXPORT_SYMBOL(sys_wait4); +#ifdef CONFIG_MV_DMACOPY +EXPORT_SYMBOL(asm_memcpy); +#endif +#ifdef CONFIG_MV_DMAMEMZERO +EXPORT_SYMBOL(asm_memzero); +#endif + diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/calls.S linux-88fxx81/arch/arm/kernel/calls.S --- linux-2.6.12.6-armeb/arch/arm/kernel/calls.S 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/calls.S 2006-08-30 21:51:30.000000000 +0930 @@ -13,7 +13,7 @@ #define NR_syscalls 320 #else -__syscall_start: +100: /* 0 */ .long sys_restart_syscall .long sys_exit .long sys_fork_wrapper @@ -27,7 +27,7 @@ /* 10 */ .long sys_unlink .long sys_execve_wrapper .long sys_chdir - .long sys_time /* used by libc4 */ + .long OBSOLETE(sys_time) /* used by libc4 */ .long sys_mknod /* 15 */ .long sys_chmod .long sys_lchown16 @@ -36,15 +36,15 @@ .long sys_lseek /* 20 */ .long sys_getpid .long sys_mount - .long sys_oldumount /* used by libc4 */ + .long OBSOLETE(sys_oldumount) /* used by libc4 */ .long sys_setuid16 .long sys_getuid16 -/* 25 */ .long sys_stime +/* 25 */ .long OBSOLETE(sys_stime) .long sys_ptrace - .long sys_alarm /* used by libc4 */ + .long OBSOLETE(sys_alarm) /* used by libc4 */ .long sys_ni_syscall /* was sys_fstat */ .long sys_pause -/* 30 */ .long sys_utime /* used by libc4 */ +/* 30 */ .long OBSOLETE(sys_utime) /* used by libc4 */ .long sys_ni_syscall /* was sys_stty */ .long sys_ni_syscall /* was sys_getty */ .long sys_access @@ -90,21 +90,21 @@ .long sys_sigpending .long sys_sethostname /* 75 */ .long sys_setrlimit - .long sys_old_getrlimit /* used by libc4 */ + .long OBSOLETE(sys_old_getrlimit) /* used by libc4 */ .long sys_getrusage .long sys_gettimeofday .long sys_settimeofday /* 80 */ .long sys_getgroups16 .long sys_setgroups16 - .long old_select /* used by libc4 */ + .long OBSOLETE(old_select) /* used by libc4 */ .long sys_symlink .long sys_ni_syscall /* was sys_lstat */ /* 85 */ .long sys_readlink .long sys_uselib .long sys_swapon .long sys_reboot - .long old_readdir /* used by libc4 */ -/* 90 */ .long old_mmap /* used by libc4 */ + .long OBSOLETE(old_readdir) /* used by libc4 */ +/* 90 */ .long OBSOLETE(old_mmap) /* used by libc4 */ .long sys_munmap .long sys_truncate .long sys_ftruncate @@ -116,7 +116,7 @@ .long sys_statfs /* 100 */ .long sys_fstatfs .long sys_ni_syscall - .long sys_socketcall + .long OBSOLETE(ABI(sys_socketcall, sys_oabi_socketcall)) .long sys_syslog .long sys_setitimer /* 105 */ .long sys_getitimer @@ -127,11 +127,11 @@ /* 110 */ .long sys_ni_syscall /* was sys_iopl */ .long sys_vhangup .long sys_ni_syscall - .long sys_syscall /* call a syscall */ + .long OBSOLETE(sys_syscall) /* call a syscall */ .long sys_wait4 /* 115 */ .long sys_swapoff .long sys_sysinfo - .long sys_ipc + .long OBSOLETE(ABI(sys_ipc, sys_oabi_ipc)) .long sys_fsync .long sys_sigreturn_wrapper /* 120 */ .long sys_clone_wrapper @@ -194,8 +194,8 @@ .long sys_rt_sigtimedwait .long sys_rt_sigqueueinfo .long sys_rt_sigsuspend_wrapper -/* 180 */ .long sys_pread64 - .long sys_pwrite64 +/* 180 */ .long ABI(sys_pread64, sys_oabi_pread64) + .long ABI(sys_pwrite64, sys_oabi_pwrite64) .long sys_chown16 .long sys_getcwd .long sys_capget @@ -207,11 +207,11 @@ /* 190 */ .long sys_vfork_wrapper .long sys_getrlimit .long sys_mmap2 - .long sys_truncate64 - .long sys_ftruncate64 -/* 195 */ .long sys_stat64 - .long sys_lstat64 - .long sys_fstat64 + .long ABI(sys_truncate64, sys_oabi_truncate64) + .long ABI(sys_ftruncate64, sys_oabi_ftruncate64) +/* 195 */ .long ABI(sys_stat64, sys_oabi_stat64) + .long ABI(sys_lstat64, sys_oabi_lstat64) + .long ABI(sys_fstat64, sys_oabi_fstat64) .long sys_lchown .long sys_getuid /* 200 */ .long sys_getgid @@ -235,11 +235,11 @@ .long sys_pivot_root .long sys_mincore /* 220 */ .long sys_madvise - .long sys_fcntl64 + .long ABI(sys_fcntl64, sys_oabi_fcntl64) .long sys_ni_syscall /* TUX */ .long sys_ni_syscall .long sys_gettid -/* 225 */ .long sys_readahead +/* 225 */ .long ABI(sys_readahead, sys_oabi_readahead) .long sys_setxattr .long sys_lsetxattr .long sys_fsetxattr @@ -265,8 +265,8 @@ .long sys_exit_group .long sys_lookup_dcookie /* 250 */ .long sys_epoll_create - .long sys_epoll_ctl - .long sys_epoll_wait + .long ABI(sys_epoll_ctl, sys_oabi_epoll_ctl) + .long ABI(sys_epoll_wait, sys_oabi_epoll_wait) .long sys_remap_file_pages .long sys_ni_syscall /* sys_set_thread_area */ /* 255 */ .long sys_ni_syscall /* sys_get_thread_area */ @@ -280,8 +280,8 @@ .long sys_clock_gettime .long sys_clock_getres /* 265 */ .long sys_clock_nanosleep - .long sys_statfs64 - .long sys_fstatfs64 + .long sys_statfs64_wrapper + .long sys_fstatfs64_wrapper .long sys_tgkill .long sys_utimes /* 270 */ .long sys_fadvise64_64 @@ -296,23 +296,23 @@ .long sys_mq_getsetattr /* 280 */ .long sys_waitid .long sys_socket - .long sys_bind - .long sys_connect + .long ABI(sys_bind, sys_oabi_bind) + .long ABI(sys_connect, sys_oabi_connect) .long sys_listen /* 285 */ .long sys_accept .long sys_getsockname .long sys_getpeername .long sys_socketpair .long sys_send -/* 290 */ .long sys_sendto +/* 290 */ .long ABI(sys_sendto, sys_oabi_sendto) .long sys_recv .long sys_recvfrom .long sys_shutdown .long sys_setsockopt /* 295 */ .long sys_getsockopt - .long sys_sendmsg + .long ABI(sys_sendmsg, sys_oabi_sendmsg) .long sys_recvmsg - .long sys_semop + .long ABI(sys_semop, sys_oabi_semop) .long sys_semget /* 300 */ .long sys_semctl .long sys_msgsnd @@ -326,10 +326,9 @@ .long sys_add_key /* 310 */ .long sys_request_key .long sys_keyctl - .long sys_semtimedop -__syscall_end: + .long ABI(sys_semtimedop, sys_oabi_semtimedop) - .rept NR_syscalls - (__syscall_end - __syscall_start) / 4 + .rept NR_syscalls - (. - 100b) / 4 .long sys_ni_syscall .endr #endif diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/entry-armv.S linux-88fxx81/arch/arm/kernel/entry-armv.S --- linux-2.6.12.6-armeb/arch/arm/kernel/entry-armv.S 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/entry-armv.S 2006-08-30 21:51:30.000000000 +0930 @@ -23,6 +23,9 @@ #include "entry-header.S" +#ifdef CONFIG_ARCH_MV88fxx81 +#include +#endif /* * Invalid mode handlers */ @@ -59,11 +62,21 @@ /* * SVC mode handlers */ + +#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5) +#define SPFIX(code...) code +#else +#define SPFIX(code...) +#endif + .macro svc_entry, sym sub sp, sp, #S_FRAME_SIZE + SPFIX( tst sp, #4 ) + SPFIX( bicne sp, sp, #4 ) stmia sp, {r0 - r12} @ save r0 - r12 ldr r2, .LC\sym add r0, sp, #S_FRAME_SIZE + SPFIX( addne r0, r0, #4 ) ldmia r2, {r2 - r4} @ get pc, cpsr add r5, sp, #S_SP mov r1, lr @@ -261,7 +274,14 @@ /* * User mode handlers + * + * EABI note: sp_svc is always 64-bit aligned here, so should S_FRAME_SIZE */ + +#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5) && (S_FRAME_SIZE & 7) +#error "sizeof(struct pt_regs) must be a multiple of 8" +#endif + .macro usr_entry, sym sub sp, sp, #S_FRAME_SIZE @ Allocate frame size in one go stmia sp, {r0 - r12} @ save r0 - r12 @@ -512,7 +532,55 @@ str r3, [r4, #-15] @ TLS val at 0xffff0ff0 #endif mcr p15, 0, r6, c3, c0, 0 @ Set domain register -#ifdef CONFIG_VFP +#ifdef CONFIG_VFP_RUN_FAST_MODE + @ In run-fast-mode, don't use the lazy context. On every + @ context switch, switch the VFP registers. + +#ifdef CONFIG_ARCH_MV88fxx81 + mv_check_orion_ver r4 + tst r4, #MV_ORION2 + bne rfm /* if Orion II then RFM */ + b no_vfp_rfm /* if others then no VFP */ + +#endif +rfm: + VFPFMRX r4, FPSCR @ First thing save FPSCR + @ Store the registers to be used + stmia sp, {r1, r2} + + @ Make r1 and r2 point to vfp_state union + add r1, r1, #TI_VFPSTATE + add r2, r2, #((TI_VFPSTATE) - (TI_CPU_DOMAIN)) + @ The - #TI_CPU_DOMAIN since r2 was + @ just previously updated with + @ + #TI_CPU_DOMAIN + + @ First save the VFP reigsters + VFPFSTMIA r1 @ save the working registers + VFPFMRX ip, FPEXC @ Load the FPEXC register + VFPFMRX r6, FPINST @ FPINST (always there, rev0 onwards) + tst ip, #FPEXC_FPV2 @ is there an FPINST2 to read? + VFPFMRX r8, FPINST2, NE @ FPINST2 if needed - avoids reading + @ nonexistant reg on rev0 + stmia r1, {r4, r6, r8, ip} @ save FPEXC, FPSCR, FPINST, FPINST2 + @ and point r4 at the word at the + @ start of the register dump + + @ Now re-load the VFP registers + VFPFLDMIA r2 @ Load VFP registers + ldmia r2, {r4, r6, r8, ip} @ load FPEXC, FPSCR, FPINST, FPINST2 + orr ip, ip, #FPEXC_ENABLE @ Always enable VFP + tst ip, #FPEXC_FPV2 @ is there an FPINST2 to write? + VFPFMXR FPINST2, r8, NE @ FPINST2 if needed - avoids writing + @ nonexistant reg on rev0 + VFPFMXR FPINST, r6 + VFPFMXR FPEXC, ip + orr r4, r4, #0x03000000 @ Always enable run fast mode + VFPFMXR FPSCR, r4 + + ldmia sp, {r1, r2} +no_vfp_rfm: +#elif defined(CONFIG_VFP) @ Always disable VFP so we can lazily save/restore the old @ state. This occurs in the context of the previous thread. VFPFMRX r4, FPEXC @@ -623,8 +691,11 @@ * The kernel itself must perform the operation. * A special ghost syscall is used for that (see traps.c). */ + stmfd sp!, {r7, lr} + mov r7, #0xff00 @ 0xfff0 into r7 for EABI + orr r7, r7, #0xf0 swi #0x9ffff0 - mov pc, lr + ldmfd sp!, {r7, pc} #elif __LINUX_ARM_ARCH__ < 6 diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/entry-common.S linux-88fxx81/arch/arm/kernel/entry-common.S --- linux-2.6.12.6-armeb/arch/arm/kernel/entry-common.S 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/entry-common.S 2006-08-30 21:51:30.000000000 +0930 @@ -99,13 +99,8 @@ run on an ARM7 and we can save a couple of instructions. --pb */ #ifdef CONFIG_CPU_ARM710 - .macro arm710_bug_check, instr, temp - and \temp, \instr, #0x0f000000 @ check for SWI - teq \temp, #0x0f000000 - bne .Larm700bug - .endm - -.Larm700bug: +#define A710(code...) code +.Larm710bug: ldr r0, [sp, #S_PSR] @ Get calling cpsr sub lr, lr, #4 str lr, [r8] @@ -116,8 +111,7 @@ add sp, sp, #S_FRAME_SIZE movs pc, lr #else - .macro arm710_bug_check, instr, temp - .endm +#define A710(code...) #endif .align 5 @@ -135,14 +129,47 @@ /* * Get the system call number. */ +#if defined(CONFIG_OABI_COMPAT) + /* + * If we have CONFIG_OABI_COMPAT then we need to look at the swi + * value to determine if it is an EABI or an old ABI call. + */ #ifdef CONFIG_ARM_THUMB - tst r8, #PSR_T_BIT @ this is SPSR from save_user_regs + tst r8, #PSR_T_BIT + movne r10, #0 @ no thumb OABI emulation + ldreq r10, [lr, #-4] @ get SWI instruction +#else + ldr r10, [lr, #-4] @ get SWI instruction + A710( and ip, r10, #0x0f000000 @ check for SWI ) + A710( teq ip, #0x0f000000 ) + A710( bne .Larm710bug ) +#endif + +#elif defined(CONFIG_AEABI) + + /* + * Pure EABI user space always put syscall number into scno (r7). + */ + A710( ldr ip, [lr, #-4] @ get SWI instruction ) + A710( and ip, ip, #0x0f000000 @ check for SWI ) + A710( teq ip, #0x0f000000 ) + A710( bne .Larm710bug ) + +#elif defined(CONFIG_ARM_THUMB) + + /* Legacy ABI only, possibly thumb mode. */ + tst r8, #PSR_T_BIT @ this is SPSR from save_user_regs addne scno, r7, #__NR_SYSCALL_BASE @ put OS number in ldreq scno, [lr, #-4] #else + + /* Legacy ABI only. */ ldr scno, [lr, #-4] @ get SWI instruction + A710( and ip, scrno, #0x0f000000 @ check for SWI ) + A710( teq ip, #0x0f000000 ) + A710( bne .Larm710bug ) + #endif - arm710_bug_check scno, ip #ifdef CONFIG_ALIGNMENT_TRAP ldr ip, __cr_alignment @@ -151,19 +178,33 @@ #endif enable_irq - str r4, [sp, #-S_OFF]! @ push fifth arg - get_thread_info tsk + adr tbl, sys_call_table @ load syscall table pointer ldr ip, [tsk, #TI_FLAGS] @ check for syscall tracing - bic scno, scno, #0xff000000 @ mask off SWI op-code + + +#if defined(CONFIG_OABI_COMPAT) + /* + * If the swi argument is zero, this is an EABI call and we do nothing. + * + * If this is an old ABI call, get the syscall number into scno and + * get the old ABI syscall table address. + */ + bics r10, r10, #0xff000000 + eorne scno, r10, #__NR_OABI_SYSCALL_BASE + ldrne tbl, =sys_oabi_call_table +#elif !defined(CONFIG_AEABI) + + bic scno, scno, #0xff000000 @ mask off SWI op-code eor scno, scno, #__NR_SYSCALL_BASE @ check OS number - adr tbl, sys_call_table @ load syscall table pointer +#endif + str r4, [sp, #-S_OFF]! @ push fifth arg tst ip, #_TIF_SYSCALL_TRACE @ are we tracing syscalls? bne __sys_trace - adr lr, ret_fast_syscall @ return address cmp scno, #NR_syscalls @ check upper syscall limit - ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine + adr lr, ret_fast_syscall @ return address + ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine add r1, sp, #S_OFF 2: mov why, #0 @ no longer a real syscall @@ -201,19 +242,33 @@ __cr_alignment: .word cr_alignment #endif + .ltorg + +/* + * This is the syscall table declaration for native ABI syscalls. + * With EABI a couple syscalls are obsolete and defined as sys_ni_syscall. + */ +#define ABI(native, compat) native +#ifdef CONFIG_AEABI +#define OBSOLETE(syscall) sys_ni_syscall +#else +#define OBSOLETE(syscall) syscall +#endif .type sys_call_table, #object ENTRY(sys_call_table) #include "calls.S" +#undef ABI +#undef OBSOLETE /*============================================================================ * Special system call wrappers */ @ r0 = syscall number -@ r5 = syscall table +@ tbl = syscall table .type sys_syscall, #function sys_syscall: - eor scno, r0, #__NR_SYSCALL_BASE + eor scno, r0, #__NR_OABI_SYSCALL_BASE cmp scno, #__NR_syscall - __NR_SYSCALL_BASE cmpne scno, #NR_syscalls @ check range stmloia sp, {r5, r6} @ shuffle args @@ -265,6 +320,31 @@ str r5, [sp, #4] @ push sixth arg b sys_futex +#ifdef CONFIG_AEABI + +sys_pread64_wrapper: + str r5, [sp, #4] @ push top half of last arg + b sys_pread64 + +sys_pwrite64_wrapper: + str r5, [sp, #4] @ push top half of last arg + b sys_pwrite64 + +#else + .set sys_pread64_wrapper, sys_pread64 + .set sys_pwrite64_wrapper, sys_pwrite64 +#endif + +sys_statfs64_wrapper: + teq r1, #88 + moveq r1, #84 + b sys_statfs64 + +sys_fstatfs64_wrapper: + teq r1, #88 + moveq r1, #84 + b sys_fstatfs64 + /* * Note: off_4k (r5) is always units of 4K. If we can't do the requested * offset, we return EINVAL. @@ -281,3 +361,49 @@ str r5, [sp, #4] b do_mmap2 #endif + + +#ifdef CONFIG_OABI_COMPAT + +/* + * These are syscalls with argument register differences + */ + +sys_oabi_pread64: + stmia sp, {r3, r4} + b sys_pread64 + +sys_oabi_pwrite64: + stmia sp, {r3, r4} + b sys_pwrite64 + +sys_oabi_truncate64: + mov r3, r2 + mov r2, r1 + b sys_truncate64 + +sys_oabi_ftruncate64: + mov r3, r2 + mov r2, r1 + b sys_ftruncate64 + +sys_oabi_readahead: + str r3, [sp] + mov r3, r2 + mov r2, r1 + b sys_readahead +/* + * Let's declare a second syscall table for old ABI binaries + * using the compatibility syscall entries. + */ +#define ABI(native, compat) compat +#define OBSOLETE(syscall) syscall + + .type sys_oabi_call_table, #object +ENTRY(sys_oabi_call_table) +#include "calls.S" +#undef ABI +#undef OBSOLETE + +#endif + diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/entry-header.S linux-88fxx81/arch/arm/kernel/entry-header.S --- linux-2.6.12.6-armeb/arch/arm/kernel/entry-header.S 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/entry-header.S 2006-08-30 21:51:30.000000000 +0930 @@ -19,6 +19,7 @@ @ @ Most of the stack format comes from struct pt_regs, but with @ the addition of 8 bytes for storing syscall args 5 and 6. +@ This _must_ remain a multiple of 8 for EABI. @ #define S_OFF 8 diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/functionlist linux-88fxx81/arch/arm/kernel/functionlist --- linux-2.6.12.6-armeb/arch/arm/kernel/functionlist 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/functionlist 2006-09-27 01:34:15.000000000 +0930 @@ -0,0 +1,320 @@ +*(.text._text) +*(.text.cpu_idle) +*(.text.do_gettimeofday) +*(.text.sys_oabi_fcntl64) +*(.text.sys_oabi_socketcall) +*(.text.consistent_sync) +*(.text.mvOsIoVirtToPhy) +*(.text.mvOsCacheInvalidate) +*(.text.__wake_up) +*(.text.__wake_up_locked) +*(.text.sys_gettimeofday) +*(.text.timespec_trunc) +*(.text.current_fs_time) +*(.text.__do_softirq) +*(.text.do_softirq) +*(.text.local_bh_enable) +*(.text.del_timer) +*(.text.__mod_timer) +*(.text.mod_timer) +*(.text.add_wait_queue) +*(.text.__wake_up_bit) +*(.text.add_to_page_cache) +*(.text.page_waitqueue) +*(.text.unlock_page) +*(.text.mempool_alloc) +*(.text.mempool_free) +*(.text.mempool_alloc_slab) +*(.text.mempool_free_slab) +*(.text.bad_range) +*(.text.__mod_page_state) +*(.text.free_hot_cold_page) +*(.text.__pagevec_free) +*(.text.buffered_rmqueue) +*(.text.zone_watermark_ok) +*(.text.__alloc_pages) +*(.text.__get_free_pages) +*(.text.__free_pages) +*(.text.__read_page_state) +*(.text.get_dirty_limits) +*(.text.test_set_page_writeback) +*(.text.__kmalloc) +*(.text.kmem_cache_alloc) +*(.text.kfree) +*(.text.kmem_cache_free) +*(.text.__pagevec_release_nonlru) +*(.text.mark_page_accessed) +*(.text.release_pages) +*(.text.__pagevec_lru_add) +*(.text.lru_add_drain) +*(.text.shrink_slab) +*(.text.shrink_zone) +*(.text.try_to_free_pages) +*(.text.wakeup_kswapd) +*(.text.page_referenced) +*(.text.rw_verify_area) +*(.text.do_sync_read) +*(.text.vfs_read) +*(.text.sys_read) +*(.text.fput) +*(.text.fget) +*(.text.__brelse) +*(.text.__find_get_block) +*(.text.submit_bh) +*(.text.__getblk) +*(.text.__bread) +*(.text.bio_destructor) +*(.text.bio_alloc_bioset) +*(.text.bio_endio) +*(.text.pipe_poll) +*(.text.sys_fcntl64) +*(.text.poll_freewait) +*(.text.__pollwait) +*(.text.do_select) +*(.text.sys_select) +*(.text.locks_alloc_lock) +*(.text.locks_copy_lock) +*(.text.locks_insert_lock) +*(.text.locks_delete_lock) +*(.text.__posix_lock_file) +*(.text.fcntl_setlk64) +*(.text.shrink_icache_memory) +*(.text.mpage_readpages) +*(.text.dnotify_parent) +*(.text.ext3_block_to_path) +*(.text.ext3_get_branch) +*(.text.ext3_get_block_handle) +*(.text.ext3_get_block) +*(.text.kref_put) +*(.text.radix_tree_preload) +*(.text.memcmp) +*(.text.__ashrdi3) +*(.text.__aeabi_lasr) +*(.text.elv_set_request) +*(.text.get_request) +*(.text.__make_request) +*(.text.generic_make_request) +*(.text.submit_bio) +*(.text.__end_that_request_first) +*(.text.scsi_dispatch_cmd) +*(.text.scsi_softirq) +*(.text.scsi_decide_disposition) +*(.text.scsi_device_unbusy) +*(.text.scsi_run_queue) +*(.text.scsi_end_request) +*(.text.scsi_io_completion) +*(.text.scsi_request_fn) +*(.text.mv_ial_ht_queuecommand) +*(.text.mv_ial_lib_generate_prd) +*(.text.mvExecuteScsiCommand) +*(.text.mvSataExecuteScsiCommand) +*(.text.mvSataQueueCommand) +*(.text.mvSataInterruptServiceRoutine) +*(.text.handleEdmaInterrupt) +*(.text.handleEdmaResponse) +*(.text.SALCommandCompletionCB) +*(.text.IALCompletion) +*(.text.sockfd_lookup) +*(.text.sock_sendmsg) +*(.text.egiga_tx) +*(.text.egiga_poll) +*(.text.sock_poll) +*(.text.sys_sendto) +*(.text.sys_socketcall) +*(.text.sock_wfree) +*(.text.lock_sock) +*(.text.release_sock) +*(.text.sock_def_readable) +*(.text.sk_reset_timer) +*(.text.skb_clone) +*(.text.alloc_skb) +*(.text.kfree_skbmem) +*(.text.__kfree_skb) +*(.text.skb_release_data) +*(.text.memcpy_toiovec) +*(.text.skb_copy_datagram_iovec) +*(.text.datagram_poll) +*(.text.dev_queue_xmit) +*(.text.net_tx_action) +*(.text.netif_receive_skb) +*(.text.net_rx_action) +*(.text.eth_type_trans) +*(.text.qdisc_restart) +*(.text.pfifo_fast_enqueue) +*(.text.pfifo_fast_dequeue) +*(.text.pfifo_fast_requeue) +*(.text.rt_hash_code) +*(.text.ip_route_input) +*(.text.ip_local_deliver) +*(.text.ip_rcv) +*(.text.ip_finish_output) +*(.text.ip_queue_xmit) +*(.text.ip_output) +*(.text.tcp_poll) +*(.text.tcp_sendmsg) +*(.text.tcp_recvmsg) +*(.text.tcp_rcv_space_adjust) +*(.text.tcp_event_data_recv) +*(.text.tcp_rtt_estimator) +*(.text.tcp_ack) +*(.text.__tcp_data_snd_check) +*(.text.__tcp_ack_snd_check) +*(.text.tcp_rcv_established) +*(.text.tcp_set_skb_tso_segs) +*(.text.__tcp_select_window) +*(.text.tcp_transmit_skb) +*(.text.tcp_current_mss) +*(.text.tcp_write_xmit) +*(.text.tcp_v4_send_check) +*(.text.tcp_v4_do_rcv) +*(.text.tcp_v4_rcv) +*(.text.inet_sendmsg) +*(.text.packet_rcv) +*(.text.mvEthPortTxDone) +*(.text.mvEthPortTx) +*(.text.mvEthPortRx) +*(.text.mvEthPortRxDone) +*(.text.egiga_rx_fill) +*(.text.__switch_to) +*(.text.ret_fast_syscall) +*(.text.vector_swi) +*(.text.sys_oabi_pwrite64) +*(.text.arm926_flush_user_cache_range) +*(.text.arm926_dma_inv_range) +*(.text.arm926_dma_clean_range) +*(.text.arm926_dma_flush_range) +*(.text.arm926_cache_fns) +*(.text.cpu_arm926_switch_mm) +*(.text.less4) +*(.text.csum_partial) +*(.text.__udivsi3) +*(.text.__divsi3) +*(.text.__aeabi_idivmod) +*(.text.memmove) +*(.text.memset) +*(.text.__memzero) +*(.text.__put_user_4) +*(.text.__arch_copy_to_user) +*(.text.c2u_dest_aligned) +*(.text.c2u_0fupi) +*(.text.c2u_0cpynopld) +*(.text.c2u_0rem8lp) +*(.text.c2u_0nowords) +*(.text.c2u_src_not_aligned) +*(.text.__arch_copy_from_user) +*(.text.cfu_0fupi) +*(.text.cfu_0rem8lp) +*(.text.cfu_finished) +*(.text.schedule) +*(.text.cond_resched) +*(.text.cond_resched_softirq) +*(.text.schedule_timeout) +*(.text.flush_cache_page) +*(.text.flush_dcache_page) +*(.text.dma_copy) +*(.text.dma_copy_from_user) +*(.text.dma_copy_to_user) +*(.text.sys_time) +*(.text.prepare_to_wait) +*(.text.finish_wait) +*(.text.end_page_writeback) +*(.text.find_lock_page) +*(.text.find_get_pages_tag) +*(.text.grab_cache_page_nowait) +*(.text.remove_suid) +*(.text.generic_file_buffered_write) +*(.text.__generic_file_aio_write_nolock) +*(.text.generic_file_aio_write) +*(.text.set_page_refs) +*(.text.free_hot_page) +*(.text.free_pages) +*(.text.balance_dirty_pages_ratelimited) +*(.text.throttle_vm_writeout) +*(.text.wakeup_bdflush) +*(.text.clear_page_dirty_for_io) +*(.text.__set_page_dirty_nobuffers) +*(.text.test_clear_page_dirty) +*(.text.test_clear_page_writeback) +*(.text.__pagevec_release) +*(.text.pagevec_lookup_tag) +*(.text.kswapd) +*(.text.vma_prio_tree_next) +*(.text.blk_queue_bounce) +*(.text.page_check_address) +*(.text.page_referenced_one) +*(.text.page_referenced_file) +*(.text.do_sync_write) +*(.text.vfs_write) +*(.text.sys_pwrite64) +*(.text.fget_light) +*(.text.end_buffer_async_write) +*(.text.mark_buffer_async_write) +*(.text.set_bh_page) +*(.text.mark_buffer_dirty) +*(.text.mark_buffer_dirty_inode) +*(.text.__block_commit_write) +*(.text.generic_commit_write) +*(.text.block_commit_write) +*(.text.end_bio_bh_io_sync) +*(.text.ll_rw_block) +*(.text.drop_buffers) +*(.text.recalc_bh_state) +*(.text.alloc_buffer_head) +*(.text.free_buffer_head) +*(.text.try_to_free_buffers) +*(.text.try_to_release_page) +*(.text.alloc_page_buffers) +*(.text.create_empty_buffers) +*(.text.__block_write_full_page) +*(.text.block_write_full_page) +*(.text.__block_prepare_write) +*(.text.block_prepare_write) +*(.text.bio_alloc) +*(.text.bio_put) +*(.text.__put_super_and_need_restart) +*(.text.fasync_helper) +*(.text.flock64_to_posix_lock) +*(.text.posix_test_lock) +*(.text.fcntl_getlk64) +*(.text.shrink_dcache_memory) +*(.text.inode_update_time) +*(.text.__mark_inode_dirty) +*(.text.__writeback_single_inode) +*(.text.writeback_inodes) +*(.text.mpage_writepages) +*(.text.ext3_file_write) +*(.text.ext3_writepage_trans_blocks) +*(.text.ext3_prepare_write) +*(.text.ext3_writeback_commit_write) +*(.text.ext3_writeback_writepage) +*(.text.ext3_releasepage) +*(.text.ext3_journal_start_sb) +*(.text.__ext3_journal_stop) +*(.text.start_this_handle) +*(.text.journal_start) +*(.text.journal_stop) +*(.text.journal_try_to_free_buffers) +*(.text.__log_space_left) +*(.text.journal_blocks_per_page) +*(.text.journal_grab_journal_head) +*(.text.handle_stripe) +*(.text.xor_arm4regs_4) +*(.text.xor_mv) +*(.text.mvXorStateGet) +*(.text.mvXorTransfer) +*(.text.mv_xor_isr) +*(.text.__down_read_trylock) +*(.text.blk_run_queue) +*(.text.as_set_request) +*(.text.sd_rw_intr) +*(.text.sock_aio_read) +*(.text.sys_send) +*(.text.sock_common_recvmsg) +*(.text.sk_stream_rfree) +*(.text.cleanup_rbuf) +*(.text.tcp_rcv_rtt_update) +*(.text.tcp_data_queue) +*(.text.tcp_urg) +*(.text.tcp_send_ack) +*(.text.tcp_send_delayed_ack) +*(.text.udp_poll) diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/functionlist_nas_ext3 linux-88fxx81/arch/arm/kernel/functionlist_nas_ext3 --- linux-2.6.12.6-armeb/arch/arm/kernel/functionlist_nas_ext3 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/functionlist_nas_ext3 2006-08-30 20:38:28.000000000 +0930 @@ -0,0 +1,320 @@ +*(.text._text) +*(.text.cpu_idle) +*(.text.do_gettimeofday) +*(.text.sys_oabi_fcntl64) +*(.text.sys_oabi_socketcall) +*(.text.consistent_sync) +*(.text.mvOsIoVirtToPhy) +*(.text.mvOsCacheInvalidate) +*(.text.__wake_up) +*(.text.__wake_up_locked) +*(.text.sys_gettimeofday) +*(.text.timespec_trunc) +*(.text.current_fs_time) +*(.text.__do_softirq) +*(.text.do_softirq) +*(.text.local_bh_enable) +*(.text.del_timer) +*(.text.__mod_timer) +*(.text.mod_timer) +*(.text.add_wait_queue) +*(.text.__wake_up_bit) +*(.text.add_to_page_cache) +*(.text.page_waitqueue) +*(.text.unlock_page) +*(.text.mempool_alloc) +*(.text.mempool_free) +*(.text.mempool_alloc_slab) +*(.text.mempool_free_slab) +*(.text.bad_range) +*(.text.__mod_page_state) +*(.text.free_hot_cold_page) +*(.text.__pagevec_free) +*(.text.buffered_rmqueue) +*(.text.zone_watermark_ok) +*(.text.__alloc_pages) +*(.text.__get_free_pages) +*(.text.__free_pages) +*(.text.__read_page_state) +*(.text.get_dirty_limits) +*(.text.test_set_page_writeback) +*(.text.__kmalloc) +*(.text.kmem_cache_alloc) +*(.text.kfree) +*(.text.kmem_cache_free) +*(.text.__pagevec_release_nonlru) +*(.text.mark_page_accessed) +*(.text.release_pages) +*(.text.__pagevec_lru_add) +*(.text.lru_add_drain) +*(.text.shrink_slab) +*(.text.shrink_zone) +*(.text.try_to_free_pages) +*(.text.wakeup_kswapd) +*(.text.page_referenced) +*(.text.rw_verify_area) +*(.text.do_sync_read) +*(.text.vfs_read) +*(.text.sys_read) +*(.text.fput) +*(.text.fget) +*(.text.__brelse) +*(.text.__find_get_block) +*(.text.submit_bh) +*(.text.__getblk) +*(.text.__bread) +*(.text.bio_destructor) +*(.text.bio_alloc_bioset) +*(.text.bio_endio) +*(.text.pipe_poll) +*(.text.sys_fcntl64) +*(.text.poll_freewait) +*(.text.__pollwait) +*(.text.do_select) +*(.text.sys_select) +*(.text.locks_alloc_lock) +*(.text.locks_copy_lock) +*(.text.locks_insert_lock) +*(.text.locks_delete_lock) +*(.text.__posix_lock_file) +*(.text.fcntl_setlk64) +*(.text.shrink_icache_memory) +*(.text.mpage_readpages) +*(.text.dnotify_parent) +*(.text.ext3_block_to_path) +*(.text.ext3_get_branch) +*(.text.ext3_get_block_handle) +*(.text.ext3_get_block) +*(.text.kref_put) +*(.text.radix_tree_preload) +*(.text.memcmp) +*(.text.__ashrdi3) +*(.text.__aeabi_lasr) +*(.text.elv_set_request) +*(.text.get_request) +*(.text.__make_request) +*(.text.generic_make_request) +*(.text.submit_bio) +*(.text.__end_that_request_first) +*(.text.scsi_dispatch_cmd) +*(.text.scsi_softirq) +*(.text.scsi_decide_disposition) +*(.text.scsi_device_unbusy) +*(.text.scsi_run_queue) +*(.text.scsi_end_request) +*(.text.scsi_io_completion) +*(.text.scsi_request_fn) +*(.text.mv_ial_ht_queuecommand) +*(.text.mv_ial_lib_generate_prd) +*(.text.mvExecuteScsiCommand) +*(.text.mvSataExecuteScsiCommand) +*(.text.mvSataQueueCommand) +*(.text.mvSataInterruptServiceRoutine) +*(.text.handleEdmaInterrupt) +*(.text.handleEdmaResponse) +*(.text.SALCommandCompletionCB) +*(.text.IALCompletion) +*(.text.sockfd_lookup) +*(.text.sock_sendmsg) +*(.text.egiga_tx) +*(.text.egiga_poll) +*(.text.sock_poll) +*(.text.sys_sendto) +*(.text.sys_socketcall) +*(.text.sock_wfree) +*(.text.lock_sock) +*(.text.release_sock) +*(.text.sock_def_readable) +*(.text.sk_reset_timer) +*(.text.skb_clone) +*(.text.alloc_skb) +*(.text.kfree_skbmem) +*(.text.__kfree_skb) +*(.text.skb_release_data) +*(.text.memcpy_toiovec) +*(.text.skb_copy_datagram_iovec) +*(.text.datagram_poll) +*(.text.dev_queue_xmit) +*(.text.net_tx_action) +*(.text.netif_receive_skb) +*(.text.net_rx_action) +*(.text.eth_type_trans) +*(.text.qdisc_restart) +*(.text.pfifo_fast_enqueue) +*(.text.pfifo_fast_dequeue) +*(.text.pfifo_fast_requeue) +*(.text.rt_hash_code) +*(.text.ip_route_input) +*(.text.ip_local_deliver) +*(.text.ip_rcv) +*(.text.ip_finish_output) +*(.text.ip_queue_xmit) +*(.text.ip_output) +*(.text.tcp_poll) +*(.text.tcp_sendmsg) +*(.text.tcp_recvmsg) +*(.text.tcp_rcv_space_adjust) +*(.text.tcp_event_data_recv) +*(.text.tcp_rtt_estimator) +*(.text.tcp_ack) +*(.text.__tcp_data_snd_check) +*(.text.__tcp_ack_snd_check) +*(.text.tcp_rcv_established) +*(.text.tcp_set_skb_tso_segs) +*(.text.__tcp_select_window) +*(.text.tcp_transmit_skb) +*(.text.tcp_current_mss) +*(.text.tcp_write_xmit) +*(.text.tcp_v4_send_check) +*(.text.tcp_v4_do_rcv) +*(.text.tcp_v4_rcv) +*(.text.inet_sendmsg) +*(.text.packet_rcv) +*(.text.mvEthPortTxDone) +*(.text.mvEthPortTx) +*(.text.mvEthPortRx) +*(.text.mvEthPortRxDone) +*(.text.egiga_rx_fill) +*(.text.__switch_to) +*(.text.ret_fast_syscall) +*(.text.vector_swi) +*(.text.sys_oabi_pwrite64) +*(.text.arm926_flush_user_cache_range) +*(.text.arm926_dma_inv_range) +*(.text.arm926_dma_clean_range) +*(.text.arm926_dma_flush_range) +*(.text.arm926_cache_fns) +*(.text.cpu_arm926_switch_mm) +*(.text.less4) +*(.text.csum_partial) +*(.text.__udivsi3) +*(.text.__divsi3) +*(.text.__aeabi_idivmod) +*(.text.memmove) +*(.text.memset) +*(.text.__memzero) +*(.text.__put_user_4) +*(.text.__arch_copy_to_user) +*(.text.c2u_dest_aligned) +*(.text.c2u_0fupi) +*(.text.c2u_0cpynopld) +*(.text.c2u_0rem8lp) +*(.text.c2u_0nowords) +*(.text.c2u_src_not_aligned) +*(.text.__arch_copy_from_user) +*(.text.cfu_0fupi) +*(.text.cfu_0rem8lp) +*(.text.cfu_finished) +*(.text.schedule) +*(.text.cond_resched) +*(.text.cond_resched_softirq) +*(.text.schedule_timeout) +*(.text.flush_cache_page) +*(.text.flush_dcache_page) +*(.text.dma_copy) +*(.text.dma_copy_from_user) +*(.text.dma_copy_to_user) +*(.text.sys_time) +*(.text.prepare_to_wait) +*(.text.finish_wait) +*(.text.end_page_writeback) +*(.text.find_lock_page) +*(.text.find_get_pages_tag) +*(.text.grab_cache_page_nowait) +*(.text.remove_suid) +*(.text.generic_file_buffered_write) +*(.text.__generic_file_aio_write_nolock) +*(.text.generic_file_aio_write) +*(.text.set_page_refs) +*(.text.free_hot_page) +*(.text.free_pages) +*(.text.balance_dirty_pages_ratelimited) +*(.text.throttle_vm_writeout) +*(.text.wakeup_bdflush) +*(.text.clear_page_dirty_for_io) +*(.text.__set_page_dirty_nobuffers) +*(.text.test_clear_page_dirty) +*(.text.test_clear_page_writeback) +*(.text.__pagevec_release) +*(.text.pagevec_lookup_tag) +*(.text.kswapd) +*(.text.vma_prio_tree_next) +*(.text.blk_queue_bounce) +*(.text.page_check_address) +*(.text.page_referenced_one) +*(.text.page_referenced_file) +*(.text.do_sync_write) +*(.text.vfs_write) +*(.text.sys_pwrite64) +*(.text.fget_light) +*(.text.end_buffer_async_write) +*(.text.mark_buffer_async_write) +*(.text.set_bh_page) +*(.text.mark_buffer_dirty) +*(.text.mark_buffer_dirty_inode) +*(.text.__block_commit_write) +*(.text.generic_commit_write) +*(.text.block_commit_write) +*(.text.end_bio_bh_io_sync) +*(.text.ll_rw_block) +*(.text.drop_buffers) +*(.text.recalc_bh_state) +*(.text.alloc_buffer_head) +*(.text.free_buffer_head) +*(.text.try_to_free_buffers) +*(.text.try_to_release_page) +*(.text.alloc_page_buffers) +*(.text.create_empty_buffers) +*(.text.__block_write_full_page) +*(.text.block_write_full_page) +*(.text.__block_prepare_write) +*(.text.block_prepare_write) +*(.text.bio_alloc) +*(.text.bio_put) +*(.text.__put_super_and_need_restart) +*(.text.fasync_helper) +*(.text.flock64_to_posix_lock) +*(.text.posix_test_lock) +*(.text.fcntl_getlk64) +*(.text.shrink_dcache_memory) +*(.text.inode_update_time) +*(.text.__mark_inode_dirty) +*(.text.__writeback_single_inode) +*(.text.writeback_inodes) +*(.text.mpage_writepages) +*(.text.ext3_file_write) +*(.text.ext3_writepage_trans_blocks) +*(.text.ext3_prepare_write) +*(.text.ext3_writeback_commit_write) +*(.text.ext3_writeback_writepage) +*(.text.ext3_releasepage) +*(.text.ext3_journal_start_sb) +*(.text.__ext3_journal_stop) +*(.text.start_this_handle) +*(.text.journal_start) +*(.text.journal_stop) +*(.text.journal_try_to_free_buffers) +*(.text.__log_space_left) +*(.text.journal_blocks_per_page) +*(.text.journal_grab_journal_head) +*(.text.handle_stripe) +*(.text.xor_arm4regs_4) +*(.text.xor_mv) +*(.text.mvXorStateGet) +*(.text.mvXorTransfer) +*(.text.mv_xor_isr) +*(.text.__down_read_trylock) +*(.text.blk_run_queue) +*(.text.as_set_request) +*(.text.sd_rw_intr) +*(.text.sock_aio_read) +*(.text.sys_send) +*(.text.sock_common_recvmsg) +*(.text.sk_stream_rfree) +*(.text.cleanup_rbuf) +*(.text.tcp_rcv_rtt_update) +*(.text.tcp_data_queue) +*(.text.tcp_urg) +*(.text.tcp_send_ack) +*(.text.tcp_send_delayed_ack) +*(.text.udp_poll) diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/functionlist_rd2_voip linux-88fxx81/arch/arm/kernel/functionlist_rd2_voip --- linux-2.6.12.6-armeb/arch/arm/kernel/functionlist_rd2_voip 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/functionlist_rd2_voip 2006-08-30 21:51:30.000000000 +0930 @@ -0,0 +1,308 @@ +*(.text._text) +*(.text.cpu_idle) +*(.text.do_gettimeofday) +*(.text.sys_oabi_fcntl64) +*(.text.sys_oabi_socketcall) +*(.text.consistent_sync) +*(.text.mvOsIoVirtToPhy) +*(.text.mvOsCacheInvalidate) +*(.text.__wake_up) +*(.text.__wake_up_locked) +*(.text.sys_gettimeofday) +*(.text.timespec_trunc) +*(.text.current_fs_time) +*(.text.__do_softirq) +*(.text.do_softirq) +*(.text.local_bh_enable) +*(.text.del_timer) +*(.text.__mod_timer) +*(.text.mod_timer) +*(.text.add_wait_queue) +*(.text.__wake_up_bit) +*(.text.add_to_page_cache) +*(.text.page_waitqueue) +*(.text.unlock_page) +*(.text.mempool_alloc) +*(.text.mempool_free) +*(.text.mempool_alloc_slab) +*(.text.mempool_free_slab) +*(.text.bad_range) +*(.text.__mod_page_state) +*(.text.free_hot_cold_page) +*(.text.__pagevec_free) +*(.text.buffered_rmqueue) +*(.text.zone_watermark_ok) +*(.text.__alloc_pages) +*(.text.__get_free_pages) +*(.text.__free_pages) +*(.text.__read_page_state) +*(.text.get_dirty_limits) +*(.text.test_set_page_writeback) +*(.text.__kmalloc) +*(.text.kmem_cache_alloc) +*(.text.kfree) +*(.text.kmem_cache_free) +*(.text.__pagevec_release_nonlru) +*(.text.mark_page_accessed) +*(.text.release_pages) +*(.text.__pagevec_lru_add) +*(.text.lru_add_drain) +*(.text.shrink_slab) +*(.text.shrink_zone) +*(.text.try_to_free_pages) +*(.text.wakeup_kswapd) +*(.text.page_referenced) +*(.text.rw_verify_area) +*(.text.do_sync_read) +*(.text.vfs_read) +*(.text.sys_read) +*(.text.fput) +*(.text.fget) +*(.text.__brelse) +*(.text.__find_get_block) +*(.text.submit_bh) +*(.text.__getblk) +*(.text.__bread) +*(.text.bio_destructor) +*(.text.bio_alloc_bioset) +*(.text.bio_endio) +*(.text.pipe_poll) +*(.text.sys_fcntl64) +*(.text.poll_freewait) +*(.text.__pollwait) +*(.text.do_select) +*(.text.sys_select) +*(.text.locks_alloc_lock) +*(.text.locks_copy_lock) +*(.text.locks_insert_lock) +*(.text.locks_delete_lock) +*(.text.__posix_lock_file) +*(.text.fcntl_setlk64) +*(.text.shrink_icache_memory) +*(.text.mpage_readpages) +*(.text.dnotify_parent) +*(.text.ext3_block_to_path) +*(.text.ext3_get_branch) +*(.text.ext3_get_block_handle) +*(.text.ext3_get_block) +*(.text.kref_put) +*(.text.radix_tree_preload) +*(.text.memcmp) +*(.text.__ashrdi3) +*(.text.__aeabi_lasr) +*(.text.elv_set_request) +*(.text.get_request) +*(.text.__make_request) +*(.text.generic_make_request) +*(.text.submit_bio) +*(.text.__end_that_request_first) +*(.text.scsi_dispatch_cmd) +*(.text.scsi_softirq) +*(.text.scsi_decide_disposition) +*(.text.scsi_device_unbusy) +*(.text.scsi_run_queue) +*(.text.scsi_end_request) +*(.text.scsi_io_completion) +*(.text.scsi_request_fn) +*(.text.mv_ial_ht_queuecommand) +*(.text.mv_ial_lib_generate_prd) +*(.text.mvExecuteScsiCommand) +*(.text.mvSataExecuteScsiCommand) +*(.text.mvSataQueueCommand) +*(.text.mvSataInterruptServiceRoutine) +*(.text.handleEdmaInterrupt) +*(.text.handleEdmaResponse) +*(.text.SALCommandCompletionCB) +*(.text.IALCompletion) +*(.text.sockfd_lookup) +*(.text.sock_sendmsg) +*(.text.sock_poll) +*(.text.sys_sendto) +*(.text.sys_socketcall) +*(.text.sock_wfree) +*(.text.lock_sock) +*(.text.release_sock) +*(.text.sock_def_readable) +*(.text.sk_reset_timer) +*(.text.skb_clone) +*(.text.alloc_skb) +*(.text.kfree_skbmem) +*(.text.__kfree_skb) +*(.text.skb_release_data) +*(.text.memcpy_toiovec) +*(.text.skb_copy_datagram_iovec) +*(.text.datagram_poll) +*(.text.dev_queue_xmit) +*(.text.net_tx_action) +*(.text.netif_receive_skb) +*(.text.net_rx_action) +*(.text.eth_type_trans) +*(.text.qdisc_restart) +*(.text.pfifo_fast_enqueue) +*(.text.pfifo_fast_dequeue) +*(.text.pfifo_fast_requeue) +*(.text.rt_hash_code) +*(.text.ip_route_input) +*(.text.ip_local_deliver) +*(.text.ip_rcv) +*(.text.ip_finish_output) +*(.text.ip_queue_xmit) +*(.text.ip_output) +*(.text.ip_forward) +*(.text.tcp_poll) +*(.text.tcp_sendmsg) +*(.text.tcp_recvmsg) +*(.text.tcp_rcv_space_adjust) +*(.text.tcp_event_data_recv) +*(.text.tcp_rtt_estimator) +*(.text.tcp_ack) +*(.text.__tcp_data_snd_check) +*(.text.__tcp_ack_snd_check) +*(.text.tcp_rcv_established) +*(.text.tcp_set_skb_tso_segs) +*(.text.__tcp_select_window) +*(.text.tcp_transmit_skb) +*(.text.tcp_current_mss) +*(.text.tcp_write_xmit) +*(.text.tcp_v4_send_check) +*(.text.tcp_v4_do_rcv) +*(.text.tcp_v4_rcv) +*(.text.inet_sendmsg) +*(.text.packet_rcv) +*(.text.mvEthPortTxDone) +*(.text.mvEthPortTx) +*(.text.mvEthPortRx) +*(.text.mvEthPortRxDone) +*(.text.mv_gtw_rx_fill) +*(.text.mv_gtw_tx_done) +*(.text.mv_gtw_tx) +*(.text.mv_gtw_poll) +*(.text.__switch_to) +*(.text.ret_fast_syscall) +*(.text.vector_swi) +*(.text.sys_oabi_pwrite64) +*(.text.arm926_flush_user_cache_range) +*(.text.arm926_dma_inv_range) +*(.text.arm926_dma_clean_range) +*(.text.arm926_dma_flush_range) +*(.text.arm926_cache_fns) +*(.text.cpu_arm926_switch_mm) +*(.text.less4) +*(.text.csum_partial) +*(.text.__udivsi3) +*(.text.__divsi3) +*(.text.__aeabi_idivmod) +*(.text.memmove) +*(.text.memset) +*(.text.__memzero) +*(.text.__put_user_4) +*(.text.__arch_copy_to_user) +*(.text.c2u_dest_aligned) +*(.text.c2u_0fupi) +*(.text.c2u_0cpynopld) +*(.text.c2u_0rem8lp) +*(.text.c2u_0nowords) +*(.text.c2u_src_not_aligned) +*(.text.__arch_copy_from_user) +*(.text.cfu_0fupi) +*(.text.cfu_0rem8lp) +*(.text.cfu_finished) +*(.text.schedule) +*(.text.cond_resched) +*(.text.cond_resched_softirq) +*(.text.schedule_timeout) +*(.text.flush_cache_page) +*(.text.flush_dcache_page) +*(.text.dma_copy) +*(.text.dma_copy_from_user) +*(.text.dma_copy_to_user) +*(.text.sys_time) +*(.text.prepare_to_wait) +*(.text.finish_wait) +*(.text.end_page_writeback) +*(.text.find_lock_page) +*(.text.find_get_pages_tag) +*(.text.grab_cache_page_nowait) +*(.text.remove_suid) +*(.text.generic_file_buffered_write) +*(.text.__generic_file_aio_write_nolock) +*(.text.generic_file_aio_write) +*(.text.set_page_refs) +*(.text.free_hot_page) +*(.text.free_pages) +*(.text.balance_dirty_pages_ratelimited) +*(.text.throttle_vm_writeout) +*(.text.wakeup_bdflush) +*(.text.clear_page_dirty_for_io) +*(.text.__set_page_dirty_nobuffers) +*(.text.test_clear_page_dirty) +*(.text.test_clear_page_writeback) +*(.text.__pagevec_release) +*(.text.pagevec_lookup_tag) +*(.text.kswapd) +*(.text.vma_prio_tree_next) +*(.text.blk_queue_bounce) +*(.text.page_check_address) +*(.text.page_referenced_one) +*(.text.page_referenced_file) +*(.text.do_sync_write) +*(.text.vfs_write) +*(.text.sys_pwrite64) +*(.text.fget_light) +*(.text.end_buffer_async_write) +*(.text.mark_buffer_async_write) +*(.text.set_bh_page) +*(.text.mark_buffer_dirty) +*(.text.mark_buffer_dirty_inode) +*(.text.__block_commit_write) +*(.text.generic_commit_write) +*(.text.block_commit_write) +*(.text.end_bio_bh_io_sync) +*(.text.ll_rw_block) +*(.text.drop_buffers) +*(.text.recalc_bh_state) +*(.text.alloc_buffer_head) +*(.text.free_buffer_head) +*(.text.try_to_free_buffers) +*(.text.try_to_release_page) +*(.text.alloc_page_buffers) +*(.text.create_empty_buffers) +*(.text.__block_write_full_page) +*(.text.block_write_full_page) +*(.text.__block_prepare_write) +*(.text.block_prepare_write) +*(.text.bio_alloc) +*(.text.bio_put) +*(.text.__put_super_and_need_restart) +*(.text.fasync_helper) +*(.text.flock64_to_posix_lock) +*(.text.posix_test_lock) +*(.text.fcntl_getlk64) +*(.text.shrink_dcache_memory) +*(.text.inode_update_time) +*(.text.__mark_inode_dirty) +*(.text.__writeback_single_inode) +*(.text.writeback_inodes) +*(.text.mpage_writepages) +*(.text.start_this_handle) +*(.text.journal_start) +*(.text.journal_stop) +*(.text.journal_try_to_free_buffers) +*(.text.__log_space_left) +*(.text.journal_blocks_per_page) +*(.text.journal_grab_journal_head) +*(.text.__down_read_trylock) +*(.text.blk_run_queue) +*(.text.as_set_request) +*(.text.sd_rw_intr) +*(.text.sock_aio_read) +*(.text.sys_send) +*(.text.sock_common_recvmsg) +*(.text.sk_stream_rfree) +*(.text.cleanup_rbuf) +*(.text.tcp_rcv_rtt_update) +*(.text.tcp_data_queue) +*(.text.tcp_urg) +*(.text.tcp_send_ack) +*(.text.tcp_send_delayed_ack) +*(.text.udp_poll) diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/functionlist_routing linux-88fxx81/arch/arm/kernel/functionlist_routing --- linux-2.6.12.6-armeb/arch/arm/kernel/functionlist_routing 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/functionlist_routing 2006-09-10 22:09:50.000000000 +0930 @@ -0,0 +1,98 @@ +*(.text.alloc_skb) +*(.text.kfree_skbmem) +*(.text.egiga_tx) +*(.text.mvEthPortTxDone) +*(.text.mvEthPortTx) +*(.text.mvEthPortRx) +*(.text.mvEthPortRxDone) +*(.text.e1000_xmit_frame) +*(.text.alloc_skb) +*(.text.arm926_dma_inv_range) +*(.text.ip_forward) +*(.text.arm926_dma_inv_range) +*(.text.ip_forward) +*(.text.e1000_clean_rx_irq) +*(.text.eth_type_trans) +*(.text.e1000_clean) +*(.text.kfree_skbmem) +*(.text.eth_type_trans) +*(.text.ip_rcv) +*(.text.netif_receive_skb) +*(.text.net_tx_action) +*(.text.ip_rcv) +*(.text.netif_receive_skb) +*(.text.dev_queue_xmit) +*(.text.qdisc_restart) +*(.text.__memzero) +*(.text.egiga_poll) +*(.text.__memzero) +*(.text.ip_route_input) +*(.text.dev_queue_xmit) +*(.text.ip_route_input) +*(.text.memmove) +*(.text.mvOsIoVirtToPhy) +*(.text.e1000_alloc_rx_buffers) +*(.text.qdisc_restart) +*(.text.consistent_sync) +*(.text.egiga_poll) +*(.text.mvEthPortRxDone) +*(.text.ip_finish_output) +*(.text.pfifo_fast_dequeue) +*(.text.__kmalloc) +*(.text.local_bh_enable) +*(.text.pfifo_fast_enqueue) +*(.text.memcmp) +*(.text.mvEthPortRx) +*(.text.pfifo_fast_enqueue) +*(.text.__kfree_skb) +*(.text.__kfree_skb) +*(.text.memmove) +*(.text.pfifo_fast_dequeue) +*(.text.skb_release_data) +*(.text.ip_output) +*(.text.memcmp) +*(.text.rt_hash_code) +*(.text.neigh_resolve_output) +*(.text.__kmalloc) +*(.text.arm926_dma_flush_range) +*(.text.ip_finish_output) +*(.text.local_bh_enable) +*(.text.egiga_rx_fill) +*(.text.ip_output) +*(.text.mvEthPortTxDone) +*(.text.skb_release_data) +*(.text.rt_hash_code) +*(.text.eth_header) +*(.text.consistent_sync) +*(.text.eth_header) +*(.text.default_idle) +*(.text.mvOsCacheInvalidate) +*(.text.neigh_resolve_output) +*(.text.kmem_cache_free) +*(.text.kfree) +*(.text.kfree) +*(.text.e1000_clean) +*(.text.kmem_cache_alloc) +*(.text.kmem_cache_free) +*(.text.kmem_cache_alloc) +*(.text.arm926_cache_fns) +*(.text.net_rx_action) +*(.text.net_rx_action) +*(.text.mvEthPortTxDone) +*(.text.arm926_dma_clean_range) +*(.text.v4wb_clear_user_page) +*(.text.pfifo_fast_requeue) +*(.text.__ashrdi3) +*(.text.mvEthPortRx) +*(.text.e1000_clean_rx_irq) +*(.text.__ashrdi3) +*(.text.arm926_dma_clean_range) +*(.text.unmap_vmas) +*(.text.set_termios) +*(.text.pfifo_fast_requeue) +*(.text.__page_cache_release) +*(.text.e1000_update_stats) +*(.text.e1000_alloc_rx_buffers) +*(.text.do_DataAbort) +*(.text.d_alloc) +*(.text.cond_resched) diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/Makefile linux-88fxx81/arch/arm/kernel/Makefile --- linux-2.6.12.6-armeb/arch/arm/kernel/Makefile 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/Makefile 2006-08-30 21:51:30.000000000 +0930 @@ -19,6 +19,7 @@ obj-$(CONFIG_ISA_DMA) += dma-isa.o obj-$(CONFIG_PCI) += bios32.o obj-$(CONFIG_SMP) += smp.o +obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o obj-$(CONFIG_IWMMXT) += iwmmxt.o AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/module.c linux-88fxx81/arch/arm/kernel/module.c --- linux-2.6.12.6-armeb/arch/arm/kernel/module.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/module.c 2006-08-30 21:51:30.000000000 +0930 @@ -100,6 +100,8 @@ break; case R_ARM_PC24: + case R_ARM_CALL: + case R_ARM_JUMP24: offset = (*(u32 *)loc & 0x00ffffff) << 2; if (offset & 0x02000000) offset -= 0x04000000; diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/process.c linux-88fxx81/arch/arm/kernel/process.c --- linux-2.6.12.6-armeb/arch/arm/kernel/process.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/process.c 2007-02-12 19:48:37.000000000 +1030 @@ -124,8 +124,14 @@ __setup("reboot=", reboot_setup); + +// LEDs off at halt, by Freecom Technologies GmbH, Berlin +extern void dataTank2led_all_off(void); + void machine_halt(void) { + leds_event(led_halted); + dataTank2led_all_off(); } EXPORT_SYMBOL(machine_halt); diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/semaphore.c linux-88fxx81/arch/arm/kernel/semaphore.c --- linux-2.6.12.6-armeb/arch/arm/kernel/semaphore.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/semaphore.c 2007-01-07 08:34:54.000000000 +1030 @@ -177,41 +177,42 @@ * ip contains the semaphore pointer on entry. Save the C-clobbered * registers (r0 to r3 and lr), but not ip, as we use it as a return * value in some cases.. + * To remain AAPCS compliant (64-bit stack align) we save r4 as well. */ -asm(" .section .sched.text,\"ax\" \n\ +asm(" .section .sched.text,\"ax\",%progbits \n\ .align 5 \n\ .globl __down_failed \n\ __down_failed: \n\ - stmfd sp!, {r0 - r3, lr} \n\ + stmfd sp!, {r0 - r4, lr} \n\ mov r0, ip \n\ bl __down \n\ - ldmfd sp!, {r0 - r3, pc} \n\ + ldmfd sp!, {r0 - r4, pc} \n\ \n\ .align 5 \n\ .globl __down_interruptible_failed \n\ __down_interruptible_failed: \n\ - stmfd sp!, {r0 - r3, lr} \n\ + stmfd sp!, {r0 - r4, lr} \n\ mov r0, ip \n\ bl __down_interruptible \n\ mov ip, r0 \n\ - ldmfd sp!, {r0 - r3, pc} \n\ + ldmfd sp!, {r0 - r4, pc} \n\ \n\ .align 5 \n\ .globl __down_trylock_failed \n\ __down_trylock_failed: \n\ - stmfd sp!, {r0 - r3, lr} \n\ + stmfd sp!, {r0 - r4, lr} \n\ mov r0, ip \n\ bl __down_trylock \n\ mov ip, r0 \n\ - ldmfd sp!, {r0 - r3, pc} \n\ + ldmfd sp!, {r0 - r4, pc} \n\ \n\ .align 5 \n\ .globl __up_wakeup \n\ __up_wakeup: \n\ - stmfd sp!, {r0 - r3, lr} \n\ + stmfd sp!, {r0 - r4, lr} \n\ mov r0, ip \n\ bl __up \n\ - ldmfd sp!, {r0 - r3, pc} \n\ + ldmfd sp!, {r0 - r4, pc} \n\ "); EXPORT_SYMBOL(__down_failed); diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/setup.c linux-88fxx81/arch/arm/kernel/setup.c --- linux-2.6.12.6-armeb/arch/arm/kernel/setup.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/setup.c 2007-02-02 21:31:35.000000000 +1030 @@ -777,7 +777,7 @@ { int i; - seq_printf(m, "Processor\t: %s rev %d (%s)\n", + seq_printf(m, "Processor\t\t: %s rev %d (%s)\n", cpu_name, (int)processor_id & 15, elf_platform); #if defined(CONFIG_SMP) @@ -788,20 +788,20 @@ (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100); } #else /* CONFIG_SMP */ - seq_printf(m, "BogoMIPS\t: %lu.%02lu\n", + seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", loops_per_jiffy / (500000/HZ), (loops_per_jiffy / (5000/HZ)) % 100); #endif /* dump out the processor features */ - seq_puts(m, "Features\t: "); + seq_puts(m, "Features\t\t: "); for (i = 0; hwcap_str[i]; i++) if (elf_hwcap & (1 << i)) seq_printf(m, "%s ", hwcap_str[i]); seq_printf(m, "\nCPU implementer\t: 0x%02x\n", processor_id >> 24); - seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]); + seq_printf(m, "CPU architecture\t: %s\n", proc_arch[cpu_architecture()]); if ((processor_id & 0x0000f000) == 0x00000000) { /* pre-ARM7 */ @@ -816,7 +816,7 @@ seq_printf(m, "CPU variant\t: 0x%x\n", (processor_id >> 20) & 15); } - seq_printf(m, "CPU part\t: 0x%03x\n", + seq_printf(m, "CPU part\t\t: 0x%03x\n", (processor_id >> 4) & 0xfff); } seq_printf(m, "CPU revision\t: %d\n", processor_id & 15); @@ -844,8 +844,8 @@ seq_puts(m, "\n"); - seq_printf(m, "Hardware\t: %s\n", machine_name); - seq_printf(m, "Revision\t: %04x\n", system_rev); + seq_printf(m, "Hardware\t\t: %s\n", machine_name); + seq_printf(m, "Revision\t\t: %04x\n", system_rev); seq_printf(m, "Serial\t\t: %08x%08x\n", system_serial_high, system_serial_low); diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/signal.c linux-88fxx81/arch/arm/kernel/signal.c --- linux-2.6.12.6-armeb/arch/arm/kernel/signal.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/signal.c 2006-08-30 21:51:30.000000000 +0930 @@ -29,15 +29,21 @@ #define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)) /* + * With EABI, the syscall number has to be loaded into r7. + */ +#define MOV_R7_NR_SIGRETURN (0xe3a07000 | (__NR_sigreturn - __NR_SYSCALL_BASE)) +#define MOV_R7_NR_RT_SIGRETURN (0xe3a07000 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) + +/* * For Thumb syscalls, we pass the syscall number via r7. We therefore * need two 16-bit instructions. */ #define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE)) #define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) -static const unsigned long retcodes[4] = { - SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN, - SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN +const unsigned long sigreturn_codes[7] = { + MOV_R7_NR_SIGRETURN, SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN, + MOV_R7_NR_RT_SIGRETURN, SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN, }; static int do_signal(sigset_t *oldset, struct pt_regs * regs, int syscall); @@ -248,7 +254,7 @@ struct sigframe { struct sigcontext sc; unsigned long extramask[_NSIG_WORDS-1]; - unsigned long retcode; + unsigned long retcode[2]; struct aux_sigframe aux __attribute__((aligned(8))); }; @@ -257,7 +263,7 @@ void __user *puc; struct siginfo info; struct ucontext uc; - unsigned long retcode; + unsigned long retcode[2]; struct aux_sigframe aux __attribute__((aligned(8))); }; @@ -495,12 +501,13 @@ if (ka->sa.sa_flags & SA_RESTORER) { retcode = (unsigned long)ka->sa.sa_restorer; } else { - unsigned int idx = thumb; + unsigned int idx = thumb << 1; if (ka->sa.sa_flags & SA_SIGINFO) - idx += 2; + idx += 3; - if (__put_user(retcodes[idx], rc)) + if (__put_user(sigreturn_codes[idx], rc) || + __put_user(sigreturn_codes[idx+1], rc+1)) return 1; /* @@ -508,7 +515,7 @@ * the return code written onto the stack. */ flush_icache_range((unsigned long)rc, - (unsigned long)(rc + 1)); + (unsigned long)(rc + 2)); retcode = ((unsigned long)rc) + thumb; } @@ -539,7 +546,7 @@ } if (err == 0) - err = setup_return(regs, ka, &frame->retcode, frame, usig); + err = setup_return(regs, ka, frame->retcode, frame, usig); return err; } @@ -573,7 +580,7 @@ err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); if (err == 0) - err = setup_return(regs, ka, &frame->retcode, frame, usig); + err = setup_return(regs, ka, frame->retcode, frame, usig); if (err == 0) { /* diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/sys_arm.c linux-88fxx81/arch/arm/kernel/sys_arm.c --- linux-2.6.12.6-armeb/arch/arm/kernel/sys_arm.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/sys_arm.c 2006-08-30 21:51:30.000000000 +0930 @@ -146,7 +146,7 @@ /* sys_select() does the appropriate kernel locking */ return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp); } - +#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT) /* * sys_ipc() is the de-multiplexer for the SysV IPC calls.. * @@ -226,7 +226,7 @@ return -ENOSYS; } } - +#endif /* Fork a new task - this creates a new program thread. * This is called indirectly via a small wrapper */ diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/sys_oabi-compat.c linux-88fxx81/arch/arm/kernel/sys_oabi-compat.c --- linux-2.6.12.6-armeb/arch/arm/kernel/sys_oabi-compat.c 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/sys_oabi-compat.c 2006-08-30 21:51:30.000000000 +0930 @@ -0,0 +1,440 @@ +/* + * arch/arm/kernel/sys_oabi-compat.c + * + * Compatibility wrappers for syscalls that are used from + * old ABI user space binaries with an EABI kernel. + * + * Author: Nicolas Pitre + * Created: Oct 7, 2005 + * Copyright: MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * The legacy ABI and the new ARM EABI have different rules making some + * syscalls incompatible especially with structure arguments. + * Most notably, Eabi says 64-bit members should be 64-bit aligned instead of + * simply word aligned. EABI also pads structures to the size of the largest + * member it contains instead of the invariant 32-bit. + * + * The following syscalls are affected: + * + * sys_stat64: + * sys_lstat64: + * sys_fstat64: + * + * struct stat64 has different sizes and some members are shifted + * Compatibility wrappers are needed for them and provided below. + * + * sys_fcntl64: + * + * struct flock64 has different sizes and some members are shifted + * A compatibility wrapper is needed and provided below. + * + * sys_statfs64: + * sys_fstatfs64: + * + * struct statfs64 has extra padding with EABI growing its size from + * 84 to 88. This struct is now __attribute__((packed,aligned(4))) + * with a small assembly wrapper to force the sz argument to 84 if it is 88 + * to avoid copying the extra padding over user space unexpecting it. + * + * sys_newuname: + * + * struct new_utsname has no padding with EABI. No problem there. + * + * sys_epoll_ctl: + * sys_epoll_wait: + * + * struct epoll_event has its second member shifted also affecting the + * structure size. Compatibility wrappers are needed and provided below. + * + * sys_ipc: + * sys_semop: + * sys_semtimedop: + * + * struct sembuf loses its padding with EABI. Since arrays of them are + * used they have to be copyed to remove the padding. Compatibility wrappers + * provided below. + * + * sys_bind: + * sys_connect: + * sys_sendmsg: + * sys_sendto: + * sys_socketcall: + * + * struct sockaddr_un loses its padding with EABI. Since the size of the + * structure is used as a validation test in unix_mkname(), we need to + * change the length argument to 110 whenever it is 112. Compatibility + * wrappers provided below. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct oldabi_stat64 { + unsigned long long st_dev; + unsigned int __pad1; + unsigned long __st_ino; + unsigned int st_mode; + unsigned int st_nlink; + + unsigned long st_uid; + unsigned long st_gid; + + unsigned long long st_rdev; + unsigned int __pad2; + + long long st_size; + unsigned long st_blksize; + unsigned long long st_blocks; + + unsigned long st_atime; + unsigned long st_atime_nsec; + + unsigned long st_mtime; + unsigned long st_mtime_nsec; + + unsigned long st_ctime; + unsigned long st_ctime_nsec; + + unsigned long long st_ino; +} __attribute__ ((packed,aligned(4))); + +static long cp_oldabi_stat64(struct kstat *stat, + struct oldabi_stat64 __user *statbuf) +{ + struct oldabi_stat64 tmp; + + tmp.st_dev = huge_encode_dev(stat->dev); + tmp.__pad1 = 0; + tmp.__st_ino = stat->ino; + tmp.st_mode = stat->mode; + tmp.st_nlink = stat->nlink; + tmp.st_uid = stat->uid; + tmp.st_gid = stat->gid; + tmp.st_rdev = huge_encode_dev(stat->rdev); + tmp.st_size = stat->size; + tmp.st_blocks = stat->blocks; + tmp.__pad2 = 0; + tmp.st_blksize = stat->blksize; + tmp.st_atime = stat->atime.tv_sec; + tmp.st_atime_nsec = stat->atime.tv_nsec; + tmp.st_mtime = stat->mtime.tv_sec; + tmp.st_mtime_nsec = stat->mtime.tv_nsec; + tmp.st_ctime = stat->ctime.tv_sec; + tmp.st_ctime_nsec = stat->ctime.tv_nsec; + tmp.st_ino = stat->ino; + return copy_to_user(statbuf,&tmp,sizeof(tmp)) ? -EFAULT : 0; +} + +asmlinkage long sys_oabi_stat64(char __user * filename, + struct oldabi_stat64 __user * statbuf) +{ + struct kstat stat; + int error = vfs_stat(filename, &stat); + if (!error) + error = cp_oldabi_stat64(&stat, statbuf); + return error; +} + +asmlinkage long sys_oabi_lstat64(char __user * filename, + struct oldabi_stat64 __user * statbuf) +{ + struct kstat stat; + int error = vfs_lstat(filename, &stat); + if (!error) + error = cp_oldabi_stat64(&stat, statbuf); + return error; +} + +asmlinkage long sys_oabi_fstat64(unsigned long fd, + struct oldabi_stat64 __user * statbuf) +{ + struct kstat stat; + int error = vfs_fstat(fd, &stat); + if (!error) + error = cp_oldabi_stat64(&stat, statbuf); + return error; +} + +struct oabi_flock64 { + short l_type; + short l_whence; + loff_t l_start; + loff_t l_len; + pid_t l_pid; +} __attribute__ ((packed,aligned(4))); + +asmlinkage long sys_oabi_fcntl64(unsigned int fd, unsigned int cmd, + unsigned long arg) +{ + struct oabi_flock64 user; + struct flock64 kernel; + mm_segment_t fs = USER_DS; /* initialized to kill a warning */ + unsigned long local_arg = arg; + int ret; + + switch (cmd) { + case F_GETLK64: + case F_SETLK64: + case F_SETLKW64: + if (copy_from_user(&user, (struct oabi_flock64 __user *)arg, + sizeof(user))) + return -EFAULT; + kernel.l_type = user.l_type; + kernel.l_whence = user.l_whence; + kernel.l_start = user.l_start; + kernel.l_len = user.l_len; + kernel.l_pid = user.l_pid; + local_arg = (unsigned long)&kernel; + fs = get_fs(); + set_fs(KERNEL_DS); + } + + ret = sys_fcntl64(fd, cmd, local_arg); + + switch (cmd) { + case F_GETLK64: + if (!ret) { + user.l_type = kernel.l_type; + user.l_whence = kernel.l_whence; + user.l_start = kernel.l_start; + user.l_len = kernel.l_len; + user.l_pid = kernel.l_pid; + if (copy_to_user((struct oabi_flock64 __user *)arg, + &user, sizeof(user))) + ret = -EFAULT; + } + case F_SETLK64: + case F_SETLKW64: + set_fs(fs); + } + + return ret; +} + +struct oabi_epoll_event { + __u32 events; + __u64 data; +} __attribute__ ((packed,aligned(4))); + +asmlinkage long sys_oabi_epoll_ctl(int epfd, int op, int fd, + struct oabi_epoll_event __user *event) +{ + struct oabi_epoll_event user; + struct epoll_event kernel; + mm_segment_t fs; + long ret; + + if (op == EPOLL_CTL_DEL) + return sys_epoll_ctl(epfd, op, fd, NULL); + if (copy_from_user(&user, event, sizeof(user))) + return -EFAULT; + kernel.events = user.events; + kernel.data = user.data; + fs = get_fs(); + set_fs(KERNEL_DS); + ret = sys_epoll_ctl(epfd, op, fd, &kernel); + set_fs(fs); + return ret; +} + +asmlinkage long sys_oabi_epoll_wait(int epfd, + struct oabi_epoll_event __user *events, + int maxevents, int timeout) +{ + struct epoll_event *kbuf; + mm_segment_t fs; + long ret, err, i; + + if (maxevents <= 0 || maxevents > (INT_MAX/sizeof(struct epoll_event))) + return -EINVAL; + kbuf = kmalloc(sizeof(*kbuf) * maxevents, GFP_KERNEL); + if (!kbuf) + return -ENOMEM; + fs = get_fs(); + set_fs(KERNEL_DS); + ret = sys_epoll_wait(epfd, kbuf, maxevents, timeout); + set_fs(fs); + err = 0; + for (i = 0; i < ret; i++) { + __put_user_error(kbuf[i].events, &events->events, err); + __put_user_error(kbuf[i].data, &events->data, err); + events++; + } + kfree(kbuf); + return err ? -EFAULT : ret; +} + +struct oabi_sembuf { + unsigned short sem_num; + short sem_op; + short sem_flg; + unsigned short __pad; +}; + +asmlinkage long sys_oabi_semtimedop(int semid, + struct oabi_sembuf __user *tsops, + unsigned nsops, + const struct timespec __user *timeout) +{ + struct sembuf *sops; + struct timespec local_timeout; + long err; + int i; + + if (nsops < 1) + return -EINVAL; + sops = kmalloc(sizeof(*sops) * nsops, GFP_KERNEL); + if (!sops) + return -ENOMEM; + err = 0; + for (i = 0; i < nsops; i++) { + __get_user_error(sops[i].sem_num, &tsops->sem_num, err); + __get_user_error(sops[i].sem_op, &tsops->sem_op, err); + __get_user_error(sops[i].sem_flg, &tsops->sem_flg, err); + tsops++; + } + if (timeout) { + /* copy this as well before changing domain protection */ + err |= copy_from_user(&local_timeout, timeout, sizeof(*timeout)); + timeout = &local_timeout; + } + if (err) { + err = -EFAULT; + } else { + mm_segment_t fs = get_fs(); + set_fs(KERNEL_DS); + err = sys_semtimedop(semid, sops, nsops, timeout); + set_fs(fs); + } + kfree(sops); + return err; +} + +asmlinkage long sys_oabi_semop(int semid, struct oabi_sembuf __user *tsops, + unsigned nsops) +{ + return sys_oabi_semtimedop(semid, tsops, nsops, NULL); +} + +extern asmlinkage int sys_ipc(uint call, int first, int second, int third, + void __user *ptr, long fifth); + +asmlinkage int sys_oabi_ipc(uint call, int first, int second, int third, + void __user *ptr, long fifth) +{ + switch (call & 0xffff) { + case SEMOP: + return sys_oabi_semtimedop(first, + (struct oabi_sembuf __user *)ptr, + second, NULL); + case SEMTIMEDOP: + return sys_oabi_semtimedop(first, + (struct oabi_sembuf __user *)ptr, + second, + (const struct timespec __user *)fifth); + default: + return sys_ipc(call, first, second, third, ptr, fifth); + } +} + +asmlinkage long sys_oabi_bind(int fd, struct sockaddr __user *addr, int addrlen) +{ + sa_family_t sa_family; + if (addrlen == 112 && + get_user(sa_family, &addr->sa_family) == 0 && + sa_family == AF_UNIX) + addrlen = 110; + return sys_bind(fd, addr, addrlen); +} + +asmlinkage long sys_oabi_connect(int fd, struct sockaddr __user *addr, int addrlen) +{ + sa_family_t sa_family; + if (addrlen == 112 && + get_user(sa_family, &addr->sa_family) == 0 && + sa_family == AF_UNIX) + addrlen = 110; + return sys_connect(fd, addr, addrlen); +} + +asmlinkage long sys_oabi_sendto(int fd, void __user *buff, + size_t len, unsigned flags, + struct sockaddr __user *addr, + int addrlen) +{ + sa_family_t sa_family; + if (addrlen == 112 && + get_user(sa_family, &addr->sa_family) == 0 && + sa_family == AF_UNIX) + addrlen = 110; + return sys_sendto(fd, buff, len, flags, addr, addrlen); +} + +asmlinkage long sys_oabi_sendmsg(int fd, struct msghdr __user *msg, unsigned flags) +{ + struct sockaddr __user *addr; + int msg_namelen; + sa_family_t sa_family; + if (msg && + get_user(msg_namelen, &msg->msg_namelen) == 0 && + msg_namelen == 112 && + get_user(addr, &msg->msg_name) == 0 && + get_user(sa_family, &addr->sa_family) == 0 && + sa_family == AF_UNIX) + { + /* + * HACK ALERT: there is a limit to how much backward bending + * we should do for what is actually a transitional + * compatibility layer. This already has known flaws with + * a few ioctls that we don't intend to fix. Therefore + * consider this blatent hack as another one... and take care + * to run for cover. In most cases it will "just work fine". + * If it doesn't, well, tough. + */ + put_user(110, &msg->msg_namelen); + } + return sys_sendmsg(fd, msg, flags); +} + +asmlinkage long sys_oabi_socketcall(int call, unsigned long __user *args) +{ + unsigned long r = -EFAULT, a[6]; + + switch (call) { + case SYS_BIND: + if (copy_from_user(a, args, 3 * sizeof(long)) == 0) + r = sys_oabi_bind(a[0], (struct sockaddr __user *)a[1], a[2]); + break; + case SYS_CONNECT: + if (copy_from_user(a, args, 3 * sizeof(long)) == 0) + r = sys_oabi_connect(a[0], (struct sockaddr __user *)a[1], a[2]); + break; + case SYS_SENDTO: + if (copy_from_user(a, args, 6 * sizeof(long)) == 0) + r = sys_oabi_sendto(a[0], (void __user *)a[1], a[2], a[3], + (struct sockaddr __user *)a[4], a[5]); + break; + case SYS_SENDMSG: + if (copy_from_user(a, args, 3 * sizeof(long)) == 0) + r = sys_oabi_sendmsg(a[0], (struct msghdr __user *)a[1], a[2]); + break; + default: + r = sys_socketcall(call, args); + } + + return r; +} diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/traps.c linux-88fxx81/arch/arm/kernel/traps.c --- linux-2.6.12.6-armeb/arch/arm/kernel/traps.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/traps.c 2006-08-30 21:51:30.000000000 +0930 @@ -401,7 +401,7 @@ struct thread_info *thread = current_thread_info(); siginfo_t info; - if ((no >> 16) != 0x9f) + if ((no >> 16) != (__ARM_NR_BASE>> 16)) return bad_syscall(no, regs); switch (no & 0xffff) { diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/kernel/vmlinux.lds.S linux-88fxx81/arch/arm/kernel/vmlinux.lds.S --- linux-2.6.12.6-armeb/arch/arm/kernel/vmlinux.lds.S 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/kernel/vmlinux.lds.S 2006-08-30 21:51:30.000000000 +0930 @@ -77,6 +77,9 @@ .text : { /* Real text segment */ _text = .; /* Text and read-only data */ + /* Then all the functions that are "hot" in profiles, to group them onto the same hugetlb entry */ +#include "functionlist" + /* Then the rest */ *(.text) SCHED_TEXT LOCK_TEXT @@ -162,6 +165,6 @@ .comment 0 : { *(.comment) } } -/* those must never be empty */ +/* those must never be empty ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support") -ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined") +ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined") */ diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/lib/ashldi3.c linux-88fxx81/arch/arm/lib/ashldi3.c --- linux-2.6.12.6-armeb/arch/arm/lib/ashldi3.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/lib/ashldi3.c 2006-08-30 21:51:38.000000000 +0930 @@ -58,4 +58,8 @@ return w.ll; } - +DItype +__aeabi_llsl (DItype u, word_type b) +{ + return __ashldi3(u, b); +} diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/lib/ashrdi3.c linux-88fxx81/arch/arm/lib/ashrdi3.c --- linux-2.6.12.6-armeb/arch/arm/lib/ashrdi3.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/lib/ashrdi3.c 2006-08-30 21:51:38.000000000 +0930 @@ -59,3 +59,8 @@ return w.ll; } +DItype +__aeabi_lasr (DItype u, word_type b) +{ + return __ashrdi3(u, b); +} diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/lib/backtrace.S linux-88fxx81/arch/arm/lib/backtrace.S --- linux-2.6.12.6-armeb/arch/arm/lib/backtrace.S 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/lib/backtrace.S 2006-08-30 21:51:38.000000000 +0930 @@ -122,7 +122,7 @@ #define reg r5 #define stack r6 -.Ldumpstm: stmfd sp!, {instr, reg, stack, r7, lr} +.Ldumpstm: stmfd sp!, {instr, reg, stack, r7, r8, lr} mov stack, r0 mov instr, r1 mov reg, #9 @@ -145,7 +145,7 @@ adrne r0, .Lcr blne printk mov r0, stack - LOADREGS(fd, sp!, {instr, reg, stack, r7, pc}) + LOADREGS(fd, sp!, {instr, reg, stack, r7, r8, pc}) .Lfp: .asciz " r%d = %08X%c" .Lcr: .asciz "\n" diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/lib/div64.S linux-88fxx81/arch/arm/lib/div64.S --- linux-2.6.12.6-armeb/arch/arm/lib/div64.S 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/lib/div64.S 2006-08-30 21:51:38.000000000 +0930 @@ -189,12 +189,12 @@ moveq pc, lr @ Division by 0: - str lr, [sp, #-4]! + str lr, [sp, #-8]! bl __div0 @ as wrong as it could be... mov yl, #0 mov yh, #0 mov xh, #0 - ldr pc, [sp], #4 + ldr pc, [sp], #8 diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/lib/lib1funcs.S linux-88fxx81/arch/arm/lib/lib1funcs.S --- linux-2.6.12.6-armeb/arch/arm/lib/lib1funcs.S 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/lib/lib1funcs.S 2006-08-30 21:51:38.000000000 +0930 @@ -206,6 +206,7 @@ ENTRY(__udivsi3) +ENTRY(__aeabi_uidiv) subs r2, r1, #1 moveq pc, lr @@ -246,6 +247,7 @@ ENTRY(__divsi3) +ENTRY(__aeabi_idiv) cmp r1, #0 eor ip, r0, r1 @ save the sign of the result. @@ -303,12 +305,33 @@ rsbmi r0, r0, #0 mov pc, lr +#ifdef CONFIG_AEABI + +ENTRY(__aeabi_uidivmod) + + stmfd sp!, {r0, r1, ip, lr} + bl __aeabi_uidiv + ldmfd sp!, {r1, r2, ip, lr} + mul r3, r0, r2 + sub r1, r1, r3 + mov pc, lr + +ENTRY(__aeabi_idivmod) + + stmfd sp!, {r0, r1, ip, lr} + bl __aeabi_idiv + ldmfd sp!, {r1, r2, ip, lr} + mul r3, r0, r2 + sub r1, r1, r3 + mov pc, lr + +#endif Ldiv0: - str lr, [sp, #-4]! + str lr, [sp, #-8]! bl __div0 mov r0, #0 @ About as wrong as it could be. - ldr pc, [sp], #4 + ldr pc, [sp], #8 diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/lib/lshrdi3.c linux-88fxx81/arch/arm/lib/lshrdi3.c --- linux-2.6.12.6-armeb/arch/arm/lib/lshrdi3.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/lib/lshrdi3.c 2006-08-30 21:51:38.000000000 +0930 @@ -58,4 +58,8 @@ return w.ll; } - +DItype +__aeabi_llsr (DItype u, word_type b) +{ + return __lshrdi3(u, b); +} diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/lib/memcpy.S linux-88fxx81/arch/arm/lib/memcpy.S --- linux-2.6.12.6-armeb/arch/arm/lib/memcpy.S 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/lib/memcpy.S 2006-08-28 20:06:22.000000000 +0930 @@ -28,6 +28,9 @@ /* * Prototype: void memcpy(void *to,const void *from,unsigned long n); */ +#ifdef CONFIG_MV_DMACOPY +ENTRY(asm_memcpy) +#endif ENTRY(memcpy) ENTRY(memmove) ENTER diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/lib/memzero.S linux-88fxx81/arch/arm/lib/memzero.S --- linux-2.6.12.6-armeb/arch/arm/lib/memzero.S 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/lib/memzero.S 2006-08-28 20:06:40.000000000 +0930 @@ -29,6 +29,9 @@ * The pointer is now aligned and the length is adjusted. Try doing the * memzero again. */ +#ifdef CONFIG_MV_DMAMEMZERO +ENTRY(asm_memzero) +#endif ENTRY(__memzero) mov r2, #0 @ 1 diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/lib/muldi3.c linux-88fxx81/arch/arm/lib/muldi3.c --- linux-2.6.12.6-armeb/arch/arm/lib/muldi3.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/lib/muldi3.c 2006-08-30 21:51:38.000000000 +0930 @@ -74,4 +74,8 @@ return w.ll; } - +DItype +__aeabi_lmul (DItype u, DItype v) +{ + return __muldi3 (u, v); +} diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/lib/ucmpdi2.c linux-88fxx81/arch/arm/lib/ucmpdi2.c --- linux-2.6.12.6-armeb/arch/arm/lib/ucmpdi2.c 2005-08-30 02:25:27.000000000 +0930 +++ linux-88fxx81/arch/arm/lib/ucmpdi2.c 2006-08-30 21:51:38.000000000 +0930 @@ -30,6 +30,7 @@ /* I Molton 29/07/01 */ #include "gcclib.h" +#include word_type __ucmpdi2 (DItype a, DItype b) @@ -48,4 +49,22 @@ return 2; return 1; } +#ifdef CONFIG_AEABI +word_type +__aeabi_ulcmp (DItype a, DItype b) +{ + DIunion au, bu; + + au.ll = a, bu.ll = b; + if ((USItype) au.s.high < (USItype) bu.s.high) + return -1; + else if ((USItype) au.s.high > (USItype) bu.s.high) + return 1; + if ((USItype) au.s.low < (USItype) bu.s.low) + return -1; + else if ((USItype) au.s.low > (USItype) bu.s.low) + return 1; + return 0; +} +#endif diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/boardEnv/DB_88FXX81/mvBoardEnvSpec.c linux-88fxx81/arch/arm/mach-mv88fxx81/Board/boardEnv/DB_88FXX81/mvBoardEnvSpec.c --- linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/boardEnv/DB_88FXX81/mvBoardEnvSpec.c 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/mach-mv88fxx81/Board/boardEnv/DB_88FXX81/mvBoardEnvSpec.c 2007-01-05 04:20:51.000000000 +1030 @@ -0,0 +1,330 @@ +/******************************************************************************* +Copyright (C) Marvell International Ltd. and its affiliates + +This software file (the "File") is owned and distributed by Marvell +International Ltd. and/or its affiliates ("Marvell") under the following +alternative licensing terms. Once you have made an election to distribute the +File under one of the following license alternatives, please (i) delete this +introductory statement regarding license alternatives, (ii) delete the two +license alternatives that you have not elected to use and (iii) preserve the +Marvell copyright notice above. + +******************************************************************************** +Marvell Commercial License Option + +If you received this File from Marvell and you have entered into a commercial +license agreement (a "Commercial License") with Marvell, the File is licensed +to you under the terms of the applicable Commercial License. + +******************************************************************************** +Marvell GPL License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File in accordance with the terms and conditions of the General +Public License Version 2, June 1991 (the "GPL License"), a copy of which is +available along with the File in the license.txt file or by writing to the Free +Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or +on the worldwide web at http://www.gnu.org/licenses/gpl.txt. + +THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED +WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY +DISCLAIMED. The GPL License provides additional details about this warranty +disclaimer. +******************************************************************************** +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + * Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + + +#include "mvBoardEnvLib.h" +#include "mvCtrlEnvSpec.h" +#include "mvCpuIf.h" +#include "mvCntmr.h" +#include "mvDevice.h" +#include "mvDramIfRegs.h" +#include "mvPciRegs.h" +#include "mvPexRegs.h" +#include "mvTwsi.h" + + +/* defines */ +#ifdef MV_DEBUG + #define DB(x) x +#else + #define DB(x) +#endif + +MV_STATUS boardEepromGet(BOARD_DATA *boardData); + +MV_U32 gBoardId = -1; +/******************************************************************************* +* mvBoardIdGet - Get Board model +* +* DESCRIPTION: +* This function returns board ID. +* Board ID is 32bit word constructed of board model (16bit) and +* board revision (16bit) in the following way: 0xMMMMRRRR. +* +* INPUT: +* None. +* +* OUTPUT: +* None. +* +* RETURN: +* 32bit board ID number, '-1' if board is undefined. +* +*******************************************************************************/ +MV_U32 mvBoardIdGet(MV_VOID) +{ + MV_U32 tmpBoardId = -1; + BOARD_DATA boardData; + + if(gBoardId != -1) + return gBoardId; + +#if defined(MV_88F1181) + + if(boardEepromGet(&boardData) == MV_OK) + { + tmpBoardId = (MV_U32)boardData.boardId; + } + else + { + /* until we have relevant data in twsi then we + will detect the board type from sdram config reg */ + if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2) + { + tmpBoardId = DB_88F1181_DDR2; + } + else + { + tmpBoardId = DB_88F1181_DDR1; + } + + } + + +#elif defined(MV_88F5181) + + if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2) + { + } + else /* DDR1 */ + { + #if defined(RD_88F5182) + tmpBoardId = RD_88F5182_2XSATA; + #elif defined(RD_88F5182_3) + tmpBoardId = RD_88F5182_2XSATA3; + #elif defined(RD_88W8660) + tmpBoardId = RD_88W8660_DDR1; + #elif defined(RD_88W8660_AP82S) + tmpBoardId = RD_88W8660_AP82S_DDR1; + #elif defined(RD_88F5181L_FE) + tmpBoardId = RD_88F5181L_VOIP_FE; + #elif defined(RD_88F5181L_GE) + tmpBoardId = RD_88F5181L_VOIP_GE; + #elif defined(MV_POS_NAS) + tmpBoardId = RD_88F5181_POS_NAS; + #elif defined(MV_VOIP) + tmpBoardId = RD_88F5181_VOIP; + #elif defined(DB_PRPMC) + tmpBoardId = DB_88F5181_DDR1_PRPMC; + #elif defined(DB_MNG) + tmpBoardId = DB_88F5181_DDR1_MNG; + #elif defined(DB_PEX_PCI) + tmpBoardId = DB_88F5181_DDR1_PEXPCI; + #elif defined(DT2_88F5182) + tmpBoardId = DT2_88F5182_FREECOM; + #endif + } + if(tmpBoardId != -1) { + gBoardId = tmpBoardId; + return tmpBoardId; + } + + + if(boardEepromGet(&boardData) == MV_OK) + { + tmpBoardId = (MV_U32)boardData.boardId; + } + else + { + /* until we have relevant data in twsi then we + will detect the board type from sdram config reg */ + if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2) + { + if((mvCtrlModelGet() == MV_5281_DEV_ID)&& + (mvCtrlRevGet() >= MV_5281_B0_REV)) + { + tmpBoardId = DB_88F5X81_DDR2; + } + else if(mvCtrlModelGet() == MV_8660_DEV_ID) + { + tmpBoardId = DB_88W8660_DDR2; + } + else if((mvCtrlModelGet() == MV_5182_DEV_ID) || (mvCtrlModelGet() == MV_5082_DEV_ID)) + { + tmpBoardId = DB_88F5182_DDR2; + } + else + { + tmpBoardId = DB_88F5181_5281_DDR2; + } + } + else /* DDR1 */ + { + if (MV_REG_READ(PCI_ARBITER_CTRL_REG(0)) & PACR_ARB_ENABLE) /* arbiter enabled*/ + { + if((mvCtrlModelGet() == MV_5281_DEV_ID)&& + (mvCtrlRevGet() >= MV_5281_B0_REV)) + { + tmpBoardId = DB_88F5X81_DDR1; + } + else + { + tmpBoardId = DB_88F5181_5281_DDR1; + } + } + else /* arbiter disabled */ + { + + if ((MV_REG_READ(PEX_CTRL_REG(0)) & PXCR_DEV_TYPE_CTRL_MASK) + == PXCR_DEV_TYPE_CTRL_CMPLX) /*root complex*/ + { + #if defined(DB_PRPMC) + tmpBoardId = DB_88F5181_DDR1_PRPMC; + + #elif defined(DB_MNG) + tmpBoardId = DB_88F5181_DDR1_MNG; + #endif + } + else if ((MV_REG_READ(PEX_CTRL_REG(0)) & PXCR_DEV_TYPE_CTRL_MASK) + == PXCR_DEV_TYPE_CTRL_POINT) /*end point*/ + { + tmpBoardId = DB_88F5181_DDR1_PEXPCI; + } + } + } + + } + + gBoardId = tmpBoardId; + + + return tmpBoardId; + +#else +# error "CHIP not selected" +#endif + + + +} + +/******************************************************************************* +* boardEepromGet - Get board identification from the EEPROM +* +* DESCRIPTION: +* +* INPUT: +* +* OUTPUT: +* None. +* +* RETURN: +* +*******************************************************************************/ +MV_STATUS boardEepromGet(BOARD_DATA *boardData) +{ + MV_TWSI_SLAVE twsiSlave; + MV_TWSI_ADDR slave; + + MV_U32 tclk; + + tclk = mvBoardTclkGet(); + + /* Init TWSI first */ + slave.type = ADDR7_BIT; + slave.address = 0x0; + mvTwsiInit(100000, tclk, &slave, 0); + + twsiSlave.slaveAddr.address = MV_BOARD_ID_EEPROM; + twsiSlave.slaveAddr.type = ADDR7_BIT; + twsiSlave.validOffset = MV_TRUE; + twsiSlave.offset = MV_BOARD_ID_EEPROM_OFFSET0; + twsiSlave.moreThen256 = MV_FALSE; + + if(MV_OK != mvTwsiRead (&twsiSlave, (MV_U8*)boardData, sizeof(BOARD_DATA))) + { + /*mvOsOutput("Fail to read Board EEPROM from offset0");*/ + return MV_FAIL; + } + +#if defined(MV_CPU_LE) + boardData->magic = MV_BYTE_SWAP_32BIT(boardData->magic); + boardData->boardId = MV_BYTE_SWAP_16BIT(boardData->boardId); + boardData->reserved1 = MV_BYTE_SWAP_32BIT(boardData->reserved1); + boardData->reserved2 = MV_BYTE_SWAP_32BIT(boardData->reserved2); +#endif + + if(boardData->magic == MV_BOARD_I2C_MAGIC) + { + return MV_OK; + } + + twsiSlave.offset = MV_BOARD_ID_EEPROM_OFFSET1; + twsiSlave.moreThen256 = MV_TRUE; + + if(MV_OK != mvTwsiRead (&twsiSlave, (MV_U8*)boardData, sizeof(BOARD_DATA))) + { + /*mvOsOutput("Fail to read Board EEPROM from offset1");*/ + return MV_FAIL; + } + + + +#if defined(MV_CPU_LE) + boardData->magic = MV_BYTE_SWAP_32BIT(boardData->magic); + boardData->boardId = MV_BYTE_SWAP_16BIT(boardData->boardId); + boardData->reserved1 = MV_BYTE_SWAP_32BIT(boardData->reserved1); + boardData->reserved2 = MV_BYTE_SWAP_32BIT(boardData->reserved2); +#endif + + if(boardData->magic == MV_BOARD_I2C_MAGIC) + { + return MV_OK; + } + + return MV_FAIL; +} + + + diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/boardEnv/DB_88FXX81/mvBoardEnvSpec.h linux-88fxx81/arch/arm/mach-mv88fxx81/Board/boardEnv/DB_88FXX81/mvBoardEnvSpec.h --- linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/boardEnv/DB_88FXX81/mvBoardEnvSpec.h 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/mach-mv88fxx81/Board/boardEnv/DB_88FXX81/mvBoardEnvSpec.h 2007-03-30 16:39:20.000000000 +0930 @@ -0,0 +1,1466 @@ +/******************************************************************************* +Copyright (C) Marvell International Ltd. and its affiliates + +This software file (the "File") is owned and distributed by Marvell +International Ltd. and/or its affiliates ("Marvell") under the following +alternative licensing terms. Once you have made an election to distribute the +File under one of the following license alternatives, please (i) delete this +introductory statement regarding license alternatives, (ii) delete the two +license alternatives that you have not elected to use and (iii) preserve the +Marvell copyright notice above. + +******************************************************************************** +Marvell Commercial License Option + +If you received this File from Marvell and you have entered into a commercial +license agreement (a "Commercial License") with Marvell, the File is licensed +to you under the terms of the applicable Commercial License. + +******************************************************************************** +Marvell GPL License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File in accordance with the terms and conditions of the General +Public License Version 2, June 1991 (the "GPL License"), a copy of which is +available along with the File in the license.txt file or by writing to the Free +Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or +on the worldwide web at http://www.gnu.org/licenses/gpl.txt. + +THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED +WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY +DISCLAIMED. The GPL License provides additional details about this warranty +disclaimer. +******************************************************************************** +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + * Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + + +#ifndef __INCmvBoardEnvSpech +#define __INCmvBoardEnvSpech + +#include "mvSysHwConfig.h" + + +/* For future use */ +#define BD_ID_DATA_START_OFFS 0x0 +#define BD_DETECT_SEQ_OFFS 0x0 +#define BD_SYS_NUM_OFFS 0x4 +#define BD_NAME_OFFS 0x8 + +#define DB_88F1181_DDR1 0x0 +#define DB_88F1181_DDR2 0x1 +#define DB_88F5181_5281_DDR1 0x2 +#define DB_88F5181_5281_DDR2 0x3 +#define DB_88F5181_DDR1_PRPMC 0x4 +#define DB_88F5181_DDR1_PEXPCI 0x5 +#define RD_88F5181_POS_NAS 0x6 +#define DB_88F5X81_DDR2 0x7 +#define DB_88F5X81_DDR1 0x8 +#define RD_88F5181_VOIP 0x9 +#define DB_88F5182_DDR2 0xA +#define RD_88F5182_2XSATA 0xB +#define DB_88F5181L_DDR2_2XTDM 0xC +#define RD_88F5181L_VOIP_FE 0xD +#define RD_88F5181L_VOIP_GE 0xE +#define RD_88F5182_2XSATA3 0xF +#define DB_88W8660_DDR2 0x10 +#define RD_88W8660_DDR1 0x11 +#define RD_88W8660_AP82S_DDR1 0x12 +#define DB_88F5181_DDR1_MNG 0x13 +#define DT2_88F5182_FREECOM 0x14 + +#define MV_MAX_BOARD_ID (DB_88F5181_DDR1_MNG + 2) + + +/* Ethernet stuff */ +#define BOARD_ETH_PORT_NUM 1 +#define MV_ETH_PORT_SGMII { 0 } + + +/* MPP possible values in the remarks should be updated from the board + sheet or taken from HW team */ + + +/* I2C bus addresses */ +#define MV_BOARD_CTRL_I2C_ADDR 0x0 /* Controller slave addr */ +#define MV_BOARD_CTRL_I2C_ADDR_TYPE ADDR7_BIT +#define MV_BOARD_DIMM0_I2C_ADDR 0x56 +#define MV_BOARD_DIMM0_I2C_ADDR_TYPE ADDR7_BIT +#define MV_BOARD_DIMM1_I2C_ADDR 0x54 +#define MV_BOARD_DIMM1_I2C_ADDR_TYPE ADDR7_BIT +#define MV_BOARD_EEPROM_I2C_ADDR 0x51 +#define MV_BOARD_EEPROM_I2C_ADDR_TYPE ADDR7_BIT +#define MV_BOARD_MAIN_EEPROM_I2C_ADDR 0x50 +#define MV_BOARD_MAIN_EEPROM_I2C_ADDR_TYPE ADDR7_BIT + +/* Eeprom board data */ +#define MV_BOARD_ID_EEPROM MV_BOARD_MAIN_EEPROM_I2C_ADDR +#define MV_BOARD_ID_EEPROM_OFFSET0 0x1F0 /* last 16byte in 0.5KByte EEPROMS */ +#define MV_BOARD_ID_EEPROM_OFFSET1 0x1FF0 /* last 16byte in 8KByte EEPROMS */ +#define MV_BOARD_I2C_MAGIC 0xFEEDFEED + + +#ifdef MV_NAND_BOOT +#define BOOT_FLASH_INDEX 0 +#define MAIN_FLASH_INDEX 0 +#else +#define BOOT_FLASH_INDEX 0 +#define MAIN_FLASH_INDEX 1 +#endif /* MV_NAND_BOOT */ + +/* Boot Flash definitions */ +#define MV_BOARD_BOOT_FLASH_BASE_ADRS mvBoardGetDeviceBaseAddr(BOOT_FLASH_INDEX, \ + BOARD_DEV_NOR_FLASH) +#define MV_BOARD_BOOT_FLASH_BUS_WIDTH mvBoardGetDeviceBusWidth(BOOT_FLASH_INDEX, \ + BOARD_DEV_NOR_FLASH) +#define MV_BOARD_BOOT_FLASH_DEVICE_WIDTH mvBoardGetDeviceWidth(BOOT_FLASH_INDEX, \ + BOARD_DEV_NOR_FLASH) + +/* Board main flash */ +#define MV_BOARD_FLASH_BASE_ADRS mvBoardGetDeviceBaseAddr(MAIN_FLASH_INDEX, \ + BOARD_DEV_NOR_FLASH) +#define MV_BOARD_FLASH_BUS_WIDTH mvBoardGetDeviceBusWidth(MAIN_FLASH_INDEX, \ + BOARD_DEV_NOR_FLASH) +#define MV_BOARD_FLASH_DEVICE_WIDTH mvBoardGetDeviceWidth(MAIN_FLASH_INDEX, \ + BOARD_DEV_NOR_FLASH) + + +/* Clocks stuff */ +#define MV_BOARD_DEFAULT_TCLK 166666667 /* Default Tclk 166MHz */ +#define MV_BOARD_DEFAULT_SYSCLK 200000000 /* Default SysClk 200MHz */ +#define MV_BOARD_DEFAULT_PCLK 400000000 /* Default Pclock 400 MHZ*/ + +#define MV_BOARD_REF_CLOCK 3686400 /* Refrence Clock 3.6864MHz */ + + +/* Supported clocks */ +#define MV_BOARD_TCLK_100MHZ 100000000 +#define MV_BOARD_TCLK_125MHZ 125000000 /* Using 50MHz Xtal */ +#define MV_BOARD_TCLK_133MHZ 133333334 +#define MV_BOARD_TCLK_150MHZ 150000000 /* Using 50MHz Xtal */ +#define MV_BOARD_TCLK_166MHZ 166666667 +#define MV_BOARD_TCLK_200MHZ 200000000 + +#define MV_BOARD_SYSCLK_100MHZ 100000000 +#define MV_BOARD_SYSCLK_125MHZ 125000000 /* Using 50MHz Xtal */ +#define MV_BOARD_SYSCLK_133MHZ 133333334 +#define MV_BOARD_SYSCLK_150MHZ 150000000 /* Using 50MHz Xtal */ +#define MV_BOARD_SYSCLK_166MHZ 166666667 +#define MV_BOARD_SYSCLK_200MHZ 200000000 + + + +#define DB_88F1181_DDR1_INFO { \ + \ + "DB-88F1181-DDR1", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {0x00110001, /* mpp0_7 */ \ + 0x00001111, /* mpp8_15 */ \ + N_A, /* mpp16_23 */ \ + N_A}, /* mppDev */ \ + \ + (1 << 1), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ N_A, N_A, N_A}, /* devCs0 */ \ + { N_A, N_A, N_A}, /* devCs1 */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{N_A, /* firstSlotDevNum */ \ + 0, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {N_A, N_A, N_A, N_A}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + 0x63, /* pexPciBridgeTwsiAddr */ \ + ADDR7_BIT, /* pexPciBridgeTwsiAddrType */ \ + \ + {N_A}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 1, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 8, /* activeLedsNumber */ \ + \ + {2, /* led0GppPin */ \ + 3, /* led1GppPin */ \ + 6, /* led2GppPin */ \ + 7, /* led3GppPin */ \ + 12, /* led4GppPin */ \ + 13, /* led5GppPin */ \ + 14, /* led6GppPin */ \ + 15}, /* led7GppPin */ \ + 1, /* ledsPolarity */ \ + 0 /* refClkGppPin */ \ +} + + +#define DB_88F1181_DDR2_INFO { \ + \ + "DB-88F1181-DDR2", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {0x00110001, /* mpp0_7 */ \ + 0x00001111, /* mpp8_15 */ \ + N_A, /* mpp16_23 */ \ + N_A}, /* mppDev */ \ + \ + (1 << 1), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ N_A, N_A, N_A}, /* devCs0 */ \ + { N_A, N_A, N_A}, /* devCs1 */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{N_A, /* firstSlotDevNum */ \ + 0, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {N_A, N_A, N_A, N_A}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + 0x63, /* pexPciBridgeTwsiAddr */ \ + ADDR7_BIT, /* pexPciBridgeTwsiAddrType */ \ + \ + {N_A}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 1, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 8, /* activeLedsNumber */ \ + \ + {2, /* led0GppPin */ \ + 3, /* led1GppPin */ \ + 6, /* led2GppPin */ \ + 7, /* led3GppPin */ \ + 12, /* led4GppPin */ \ + 13, /* led5GppPin */ \ + 14, /* led6GppPin */ \ + 15}, /* led7GppPin */ \ + 1, /* ledsPolarity */ \ + 0 /* refClkGppPin */ \ +} + + +#define DB_88F5181_5281_DDR1_MPP0_7 0x00332222 +#define DB_88F5181_5281_DDR1_MPP8_15 0x11111111 +#define DB_88F5181_5281_DDR1_MPP16_23 0x1111 +#define DB_88F5181_5281_DDR1_MPP_DEV 0x0 + + +#define DB_88F5181_5281_DDR1_INFO { \ + \ + "DB-88F5181-DDR1", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {DB_88F5181_5281_DDR1_MPP0_7, /* mpp0_7 */ \ + DB_88F5181_5281_DDR1_MPP8_15, /* mpp8_15 */ \ + DB_88F5181_5281_DDR1_MPP16_23, /* mpp16_23 */ \ + DB_88F5181_5281_DDR1_MPP_DEV}, /* mppDev */ \ + \ + ((1<<1)|(1 << 6)|(1<<7)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fcfffff, N_A, N_A}, /* devCs0 */ \ + { 0x8fefffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs1 */ \ + { 0x8fcfffff, BOARD_DEV_SEVEN_SEG, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 3, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {7, 7, 7, 7}}, /* pciSlot0 */ \ + { {6, 6, 6, 6}}, /* pciSlot1 */ \ + { {6, 6, 6, 6}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x8}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 1, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {5,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 4, /* activeLedsNumber */ \ + \ + {N_A, /* led0GppPin */ \ + N_A, /* led1GppPin */ \ + N_A, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + N_A, /* ledsPolarity */ \ + 0 /* refClkGppPin */ \ +} + +#define DB_88F5181_5281_DDR2_MPP0_7 0x00222203 +#define DB_88F5181_5281_DDR2_MPP8_15 0x00001133 +#define DB_88F5181_5281_DDR2_MPP16_23 0x0 +#define DB_88F5181_5281_DDR2_MPP_DEV 0x0 + +#define DB_88F5181_5281_DDR2_INFO { \ + \ + "DB-88F5181-DDR2", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {DB_88F5181_5281_DDR2_MPP0_7, /* mpp0_7 */ \ + DB_88F5181_5281_DDR2_MPP8_15, /* mpp8_15 */ \ + DB_88F5181_5281_DDR2_MPP16_23, /* mpp16_23 */ \ + DB_88F5181_5281_DDR2_MPP_DEV}, /* mppDev */ \ + \ + ((1 << 10)|(1 << 12)|(1<<13)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fcfffff, N_A, N_A}, /* devCs0 */ \ + { 0x8fefffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs1 */ \ + { 0x8fcfffff, N_A, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 3, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {12, 12, 12, 12}}, /* pciSlot0 */ \ + { {13, 13, 13, 13}}, /* pciSlot1 */ \ + { {13, 13, 13, 13}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x8}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 10, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {1,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 4, /* activeLedsNumber */ \ + \ + {14, /* led0GppPin */ \ + 15, /* led1GppPin */ \ + 6, /* led2GppPin */ \ + 7, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 1, /* ledsPolarity */ \ + 0 /* refClkGppPin */ \ +} + + +#define DB_88F5181_DDR1_MNG_MPP0_7 0x00000003 +#define DB_88F5181_DDR1_MNG_MPP8_15 0x10001111 +#define DB_88F5181_DDR1_MNG_MPP16_23 0x00001111 +#define DB_88F5181_DDR1_MNG_MPP_DEV 0x0 + + +#define DB_88F5181_DDR1_MNG_INFO { \ + \ + "DB-88F5181-DDR1-MNG", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {DB_88F5181_DDR1_MNG_MPP0_7, /* mpp0_7 */ \ + DB_88F5181_DDR1_MNG_MPP8_15, /* mpp8_15 */ \ + DB_88F5181_DDR1_MNG_MPP16_23, /* mpp16_23 */ \ + DB_88F5181_DDR1_MNG_MPP_DEV}, /* mppDev */ \ + \ + ((1 << 3) | (1<< 6) | (1<<7)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fcfffff, N_A, N_A}, /* devCs0 */ \ + { 0x8fefffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs1 */ \ + { 0x8fcfffff, N_A, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{N_A, /* firstSlotDevNum */ \ + N_A, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {7,7,7,7}}, /* pciSlot0 */ \ + { {6,6,6,6}}, /* pciSlot1 */ \ + { {3,3,3,3}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x1f}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + N_A, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 3, /* activeLedsNumber */ \ + \ + {12, /* led0GppPin */ \ + 13, /* led1GppPin */ \ + 14, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 0, /* ledsPolarity */ \ + 0 /* refClkGppPin */ \ +} + +#define DB_88F5181_DDR1_PRPMC_MPP0_7 0x00000003 +#define DB_88F5181_DDR1_PRPMC_MPP8_15 0x10001111 +#define DB_88F5181_DDR1_PRPMC_MPP16_23 0x00001111 +#define DB_88F5181_DDR1_PRPMC_MPP_DEV 0x0 + + +#define DB_88F5181_DDR1_PRPMC_INFO { \ + \ + "DB-88F5181-DDR1-PRPMC", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {DB_88F5181_DDR1_PRPMC_MPP0_7, /* mpp0_7 */ \ + DB_88F5181_DDR1_PRPMC_MPP8_15, /* mpp8_15 */ \ + DB_88F5181_DDR1_PRPMC_MPP16_23, /* mpp16_23 */ \ + DB_88F5181_DDR1_PRPMC_MPP_DEV}, /* mppDev */ \ + \ + ((1 << 6)|(1 << 5)|(1<<4)|(1<<7)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fcfffff, N_A, N_A}, /* devCs0 */ \ + { 0x8fefffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs1 */ \ + { 0x8fcfffff, N_A, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{N_A, /* firstSlotDevNum */ \ + N_A, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {6, 5, 4, 7}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x1f}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + N_A, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 3, /* activeLedsNumber */ \ + \ + {12, /* led0GppPin */ \ + 13, /* led1GppPin */ \ + 14, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 0, /* ledsPolarity */ \ + 0 /* refClkGppPin */ \ +} + + +#define DB_88F5181_DDR1_PEXPCI_MPP0_7 0x00330000 +#define DB_88F5181_DDR1_PEXPCI_MPP8_15 0x0 +#define DB_88F5181_DDR1_PEXPCI_MPP16_23 0x0 +#define DB_88F5181_DDR1_PEXPCI_MPP_DEV 0x0 + + +#define DB_88F5181_DDR1_PEXPCI_INFO { \ + \ + "DB-88F5181-DDR1-PEX_PCI", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {DB_88F5181_DDR1_PEXPCI_MPP0_7, /* mpp0_7 */ \ + DB_88F5181_DDR1_PEXPCI_MPP8_15, /* mpp8_15 */ \ + DB_88F5181_DDR1_PEXPCI_MPP16_23, /* mpp16_23 */ \ + DB_88F5181_DDR1_PEXPCI_MPP_DEV}, /* mppDev */ \ + \ + ((1 << 6)|(1 << 5)|(1<<4)|(1<<7)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fcfffff, N_A, N_A}, /* devCs0 */ \ + { 0x8fefffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs1 */ \ + { 0x8fcfffff, N_A, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{N_A, /* firstSlotDevNum */ \ + N_A, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {3, 6, 7, 7}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x8}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + N_A, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 4, /* activeLedsNumber */ \ + \ + {12, /* led0GppPin */ \ + 13, /* led1GppPin */ \ + 14, /* led2GppPin */ \ + 15, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 0, /* ledsPolarity */ \ + 0 /* refClkGppPin */ \ +} + +#define RD_88F5181_POS_NAS_MPP0_7 0x0 +#define RD_88F5181_POS_NAS_MPP8_15 0x0 +#define RD_88F5181_POS_NAS_MPP16_23 0x0 +#define RD_88F5181_POS_NAS_MPP_DEV 0x0 + + +#define RD_88F5181_POS_NAS_INFO { \ + \ + "RD-88F5181-88SX7042-2xSATA", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {RD_88F5181_POS_NAS_MPP0_7, /* mpp0_7 */ \ + RD_88F5181_POS_NAS_MPP8_15, /* mpp8_15 */ \ + RD_88F5181_POS_NAS_MPP16_23, /* mpp16_23 */ \ + RD_88F5181_POS_NAS_MPP_DEV}, /* mppDev */ \ + \ + ((1 << 8)|(1 << 4)|(1 << 6)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fcfffff, N_A, N_A}, /* devCs0 */ \ + { 0x8fefffff, N_A, N_A}, /* devCs1 */ \ + { 0x8fcfffff, N_A, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 1, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {6, 4, N_A, N_A}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x8}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 8, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {9,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 4, /* activeLedsNumber */ \ + \ + {12, /* led0GppPin */ \ + 13, /* led1GppPin */ \ + 14, /* led2GppPin */ \ + 15, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 0, /* ledsPolarity */ \ + 0 /* refClkGppPin */ \ +} + +#define DB_88F5X81_DDRX_MPP0_7 0x33222203 +#define DB_88F5X81_DDRX_MPP8_15 0x44000033 +#define DB_88F5X81_DDRX_MPP16_23 0x0 +#define DB_88F5X81_DDRX_MPP_DEV 0x0 + + +#define DB_88F5X81_DDR2_INFO { \ + \ + "DB-88F5X81-DDR2-A", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {DB_88F5X81_DDRX_MPP0_7, /* mpp0_7 */ \ + DB_88F5X81_DDRX_MPP8_15, /* mpp8_15 */ \ + DB_88F5X81_DDRX_MPP16_23, /* mpp16_23 */ \ + DB_88F5X81_DDRX_MPP_DEV}, /* mppDev */ \ + \ + ((1<<10)|(1 << 12)|(1<<13)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fcfffff, BOARD_DEV_SEVEN_SEG, N_A}, /* devCs0 */ \ + { 0x8fefffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs1 */ \ + { 0x8fcfffff, BOARD_DEV_NAND_FLASH, 8}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 3, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {12, 12, 12, 12}}, /* pciSlot0 */ \ + { {13, 13, 13, 13}}, /* pciSlot1 */ \ + { {13, 13, 13, 13}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x8}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 10, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {1, N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 4, /* activeLedsNumber */ \ + \ + {N_A, /* led0GppPin */ \ + N_A, /* led1GppPin */ \ + N_A, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + N_A, /* ledsPolarity */ \ + 11 /* refClkGppPin */ \ +} + + +#define DB_88F5X81_DDR1_INFO { \ + \ + "DB-88F5X81-DDR1-A", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {DB_88F5X81_DDRX_MPP0_7, /* mpp0_7 */ \ + DB_88F5X81_DDRX_MPP8_15, /* mpp8_15 */ \ + DB_88F5X81_DDRX_MPP16_23, /* mpp16_23 */ \ + DB_88F5X81_DDRX_MPP_DEV}, /* mppDev */ \ + \ + ((1<<10)|(1 << 12)|(1<<13)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fcfffff, BOARD_DEV_SEVEN_SEG, N_A}, /* devCs0 */ \ + { 0x8fefffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs1 */ \ + { 0x8fcfffff, BOARD_DEV_NAND_FLASH, 8}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 3, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {12, 12, 12, 12}}, /* pciSlot0 */ \ + { {13, 13, 13, 13}}, /* pciSlot1 */ \ + { {13, 13, 13, 13}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x8}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 10, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {1, N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 4, /* activeLedsNumber */ \ + \ + {N_A, /* led0GppPin */ \ + N_A, /* led1GppPin */ \ + N_A, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + N_A, /* ledsPolarity */ \ + 11 /* refClkGppPin */ \ +} + +#define RD_88F5181_VOIP_MPP0_7 0x00000003 +#define RD_88F5181_VOIP_MPP8_15 0x00000101 +#define RD_88F5181_VOIP_MPP16_23 0x0 +#define RD_88F5181_VOIP_MPP_DEV 0x0 + + +#define RD_88F5181_VOIP_INFO { \ + \ + "RD-88F5181-VOIP-RD1", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {RD_88F5181_VOIP_MPP0_7, /* mpp0_7 */ \ + RD_88F5181_VOIP_MPP8_15, /* mpp8_15 */ \ + RD_88F5181_VOIP_MPP16_23, /* mpp16_23 */ \ + RD_88F5181_VOIP_MPP_DEV}, /* mppDev */ \ + \ + ((1<<3)|(1<<4)|(1 << 6)|(1<<7)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fdfffff, BOARD_DEV_FPGA, N_A}, /* devCs0 */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}, /* devCs1 */ \ + { 0x8fdfffff, BOARD_DEV_FPGA, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{1, /* firstSlotDevNum */ \ + 1, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {4, 4, 4, 4}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x0}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 7, /* rtcIntPin */ \ + 6, /* switchIntPin */ \ + {2,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 3, /* activeLedsNumber */ \ + \ + {13, /* led0GppPin */ \ + 14, /* led1GppPin */ \ + 15, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 0, /* ledsPolarity */ \ + N_A /* refClkGppPin */ \ +} + + +#define DB_88F5182_DDR2_MPP0_7 0x55222203 +#define DB_88F5182_DDR2_MPP8_15 0x44550000 +#define DB_88F5182_DDR2_MPP16_23 0x0 + + +#define DB_88F5182_DDR2_INFO { \ + \ + "DB-88F5182-DDR2", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {DB_88F5182_DDR2_MPP0_7, /* mpp0_7 */ \ + DB_88F5182_DDR2_MPP8_15, /* mpp8_15 */ \ + DB_88F5182_DDR2_MPP16_23, /* mpp16_23 */ \ + N_A}, /* mppDev */ \ + \ + ((1<<0)|(1 << 1)|(1<<10)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fcfffff, BOARD_DEV_SEVEN_SEG, N_A}, /* devCs0 */ \ + { 0x8fdfffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs1 */ \ + { 0x8fcfffff, BOARD_DEV_NAND_FLASH, 8}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 3, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {0, 0, 0, 0}}, /* pciSlot0 */ \ + { {1, 1, 1, 1}}, /* pciSlot1 */ \ + { {1, 1, 1, 1}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x8}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 10, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {8,9}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 4, /* activeLedsNumber */ \ + \ + {N_A, /* led0GppPin */ \ + N_A, /* led1GppPin */ \ + N_A, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + N_A, /* ledsPolarity */ \ + 11 /* refClkGppPin */ \ +} + + +#define RD_88F5182_2XSATA_MPP0_7 0x00000003 +#define RD_88F5182_2XSATA_MPP8_15 0x55550000 +#define RD_88F5182_2XSATA_MPP16_23 0x5555 + +#define RD_88F5182_2XSATA_INFO { \ + \ + "RD-88F5182-NAS-2", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {RD_88F5182_2XSATA_MPP0_7, /* mpp0_7 */ \ + RD_88F5182_2XSATA_MPP8_15, /* mpp8_15 */ \ + RD_88F5182_2XSATA_MPP16_23, /* mpp16_23 */ \ + N_A}, /* mppDev */ \ + \ + ((1<<3)|(1 << 6)|(1<<7)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ N_A, N_A, N_A}, /* devCs0 */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}, /* devCs1 */ \ + { N_A, N_A, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 1, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {7, 6, N_A, N_A}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x8}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 3, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 1, /* activeLedsNumber */ \ + \ + {0, /* led0GppPin */ \ + N_A, /* led1GppPin */ \ + N_A, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 0, /* ledsPolarity */ \ + N_A /* refClkGppPin */ \ +} + + +#define DB_88F5181L_DDR2_2XTDM_MPP0_7 0x00222203 +#define DB_88F5181L_DDR2_2XTDM_MPP8_15 0x44000000 +#define DB_88F5181L_DDR2_2XTDM_MPP16_23 0x0 +#define DB_88F5181L_DDR2_2XTDM_MPP_DEV 0x0 + + +#define DB_88F5181L_DDR2_2XTDM_INFO { \ + \ + "DB-88F5181L-DDR2-2xTDM", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {DB_88F5181L_DDR2_2XTDM_MPP0_7, /* mpp0_7 */ \ + DB_88F5181L_DDR2_2XTDM_MPP8_15, /* mpp8_15 */ \ + DB_88F5181L_DDR2_2XTDM_MPP16_23, /* mpp16_23 */ \ + DB_88F5181L_DDR2_2XTDM_MPP_DEV}, /* mppDev */ \ + \ + ((1<<8)|(1 << 9)|(1<<10)|(1<<12)|(1<<13)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fcfffff, BOARD_DEV_SEVEN_SEG, N_A}, /* devCs0 */ \ + { 0x8fdfffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs1 */ \ + { 0x8fcfffff, BOARD_DEV_NAND_FLASH, 8}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 3, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {12, 12, 12, 12}}, /* pciSlot0 */ \ + { {13, 13, 13, 13}}, /* pciSlot1 */ \ + { {13, 13, 13, 13}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x8}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 10, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {1,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 4, /* activeLedsNumber */ \ + \ + {N_A, /* led0GppPin */ \ + N_A, /* led1GppPin */ \ + N_A, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + N_A, /* ledsPolarity */ \ + 11 /* refClkGppPin */ \ +} + + +#define RD_88F5181L_VOIP_FE_MPP0_7 0x55000003 +#define RD_88F5181L_VOIP_FE_MPP8_15 0x00000101 +#define RD_88F5181L_VOIP_FE_MPP16_23 0x0 +#define RD_88F5181L_VOIP_FE_MPP_DEV 0x0 + + +#define RD_88F5181L_VOIP_FE_INFO { \ + \ + "RD-88F5181L-VOIP-FE", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {RD_88F5181L_VOIP_FE_MPP0_7, /* mpp0_7 */ \ + RD_88F5181L_VOIP_FE_MPP8_15, /* mpp8_15 */ \ + RD_88F5181L_VOIP_FE_MPP16_23, /* mpp16_23 */ \ + RD_88F5181L_VOIP_FE_MPP_DEV}, /* mppDev */ \ + \ + ((1<<2)|(1 << 3)|(1<<4)|(1<<5)|(1<<9)|(1<<11)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ N_A, N_A, N_A}, /* devCs0 */ \ + { N_A, N_A, N_A}, /* devCs1 */ \ + { N_A, N_A, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 1, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {4, 3, N_A, N_A}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x0}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 11, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 3, /* activeLedsNumber */ \ + \ + {12, /* led0GppPin */ \ + 13, /* led1GppPin */ \ + 14, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 0, /* ledsPolarity */ \ + N_A /* refClkGppPin */ \ +} + + +#define RD_88F5181L_VOIP_GE_MPP0_7 0x55000003 +#define RD_88F5181L_VOIP_GE_MPP8_15 0x11110010 +#define RD_88F5181L_VOIP_GE_MPP16_23 0x1111 +#define RD_88F5181L_VOIP_GE_MPP_DEV 0x0 + + +#define RD_88F5181L_VOIP_GE_INFO { \ + \ + "RD-88F5181L-VOIP-GE", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {RD_88F5181L_VOIP_GE_MPP0_7, /* mpp0_7 */ \ + RD_88F5181L_VOIP_GE_MPP8_15, /* mpp8_15 */ \ + RD_88F5181L_VOIP_GE_MPP16_23, /* mpp16_23 */ \ + RD_88F5181L_VOIP_GE_MPP_DEV}, /* mppDev */ \ + \ + ((1<<4)|(1 << 5)|(1<<8)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ N_A, N_A, N_A}, /* devCs0 */ \ + { N_A, N_A, N_A}, /* devCs1 */ \ + { N_A, N_A, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 1, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {4, 10, N_A, N_A}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x0}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 5, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 3, /* activeLedsNumber */ \ + \ + {1, /* led0GppPin */ \ + 2, /* led1GppPin */ \ + 3, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 0, /* ledsPolarity */ \ + N_A /* refClkGppPin */ \ +} + + +#define RD_88F5182_2XSATA3_MPP0_7 0x00000003 +#define RD_88F5182_2XSATA3_MPP8_15 0x55550000 +#define RD_88F5182_2XSATA3_MPP16_23 0x5555 + +#define RD_88F5182_2XSATA3_INFO { \ + \ + "RD-88F5182-NAS-3", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {RD_88F5182_2XSATA3_MPP0_7, /* mpp0_7 */ \ + RD_88F5182_2XSATA3_MPP8_15, /* mpp8_15 */ \ + RD_88F5182_2XSATA3_MPP16_23, /* mpp16_23 */ \ + N_A}, /* mppDev */ \ + \ + ((1<<3)|(1 << 6)|(1<<7)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ N_A, N_A, N_A}, /* devCs0 */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}, /* devCs1 */ \ + { N_A, N_A, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 1, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {7, N_A, N_A, N_A}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x8}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 3, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 2, /* activeLedsNumber */ \ + \ + {0, /* led0GppPin */ \ + 1, /* led1GppPin */ \ + N_A, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 1, /* ledsPolarity */ \ + N_A /* refClkGppPin */ \ +} + + + + +#define RD_88W8660_MPP0_7 0x0 +#define RD_88W8660_MPP8_15 0x0 + + +#define RD_88W8660_DDR1_INFO { \ + \ + "RD-88W8660", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {RD_88W8660_MPP0_7, /* mpp0_7 */ \ + RD_88W8660_MPP8_15, /* mpp8_15 */ \ + N_A, /* mpp16_23 */ \ + N_A}, /* mppDev */ \ + \ + ((1 << 3)|(1<<4)|(1<<9)|(1<<11)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ N_A, N_A, N_A}, /* devCs0 */ \ + { N_A, N_A, N_A}, /* devCs1 */ \ + { N_A, N_A, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 1, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {4, 3, N_A, N_A}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x0}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */ \ + \ + 11, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */\ + \ + 3, /* activeLedsNumber */ \ + \ + {6, /* led0GppPin */ \ + 5, /* led1GppPin */ \ + 7, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 0, /* ledsPolarity */ \ + N_A /* refClkGppPin */ \ +} + + +#define RD_88W8660_AP82S_MPP0_7 0x22 +#define RD_88W8660_AP82S_MPP8_15 0x0 +#define RD_88W8660_AP82S_MPP_OUT_EN 0xB33 +#define RD_88W8660_AP82S_MPP_POLAR 0xB00 +#ifdef MV_NAND_BOOT +#define RD_88W8660_AP82S_BOOT_CS_INFO { 0x8fcfffff, BOARD_DEV_NAND_FLASH, 8} +#else +#define RD_88W8660_AP82S_BOOT_CS_INFO { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8} +#endif /* MV_NAND_BOOT */ + + +#define RD_88W8660_AP82S_INFO { \ + \ + "RD-88W8660-AP82S", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {RD_88W8660_AP82S_MPP0_7, /* mpp0_7 */ \ + RD_88W8660_AP82S_MPP8_15, /* mpp8_15 */ \ + N_A, /* mpp16_23 */ \ + N_A}, /* mppDev */ \ + \ + /* Int A Int B INt CD Int SW Int RTC */ \ + ((1 << 2)|(1<<3)|(1<<8)|(1<<9)|(1<<11)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ N_A, N_A, N_A}, /* devCs0 */ \ + { N_A, N_A, N_A}, /* devCs1 */ \ + { N_A, N_A, N_A}, /* devCs2/flashCs */ \ + RD_88W8660_AP82S_BOOT_CS_INFO}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 1, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {2, 3, 8, 8}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x0}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */ \ + \ + 11, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */\ + \ + 0, /* activeLedsNumber */ \ + \ + {N_A, /* led0GppPin */ \ + N_A, /* led1GppPin */ \ + N_A, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 0, /* ledsPolarity */ \ + N_A /* refClkGppPin */ \ +} + + +#define DB_88W8660_DDR2_MPP0_7 0x00002222 +#define DB_88W8660_DDR2_MPP8_15 0x00000002 + +#ifdef MV_NAND_BOOT +#define DB_88W8660_DDR2_DEV_CS_INFO \ + {{ 0x8fcfffff, BOARD_DEV_SEVEN_SEG, N_A}, /* devCs0 */ \ + { 0x8fdfffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs1 */ \ + { N_A, N_A, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NAND_FLASH, 8}} /* bootCs */ +#else +#define DB_88W8660_DDR2_DEV_CS_INFO \ + {{ 0x8fcfffff, BOARD_DEV_SEVEN_SEG, N_A}, /* devCs0 */ \ + { 0x8fdfffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs1 */ \ + { 0x8fcfffff, BOARD_DEV_NAND_FLASH, 8}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}} /* bootCs */ +#endif /* MV_NAND_BOOT */ + +#define DB_88W8660_DDR2_INFO { \ + \ + "DB-88W8660-DDR2", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {DB_88W8660_DDR2_MPP0_7, /* mpp0_7 */ \ + DB_88W8660_DDR2_MPP8_15, /* mpp8_15 */ \ + N_A, /* mpp16_23 */ \ + N_A}, /* mppDev */ \ + \ + ((1<<9)|(1 << 11)|(1<<10)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + DB_88W8660_DDR2_DEV_CS_INFO, \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 3, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {0, 0, 0, 0}}, /* pciSlot0 */ \ + { { 9, 9, 9, 9}}, /* pciSlot1 */ \ + { {11, 11, 11, 11}}}}}, /* pciSlot2 */ \ + \ + 0x68, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x8}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */ \ + \ + 10, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */\ + \ + 4, /* activeLedsNumber */ \ + \ + {N_A, /* led0GppPin */ \ + N_A, /* led1GppPin */ \ + N_A, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + N_A, /* ledsPolarity */ \ + N_A /* refClkGppPin */ \ +} + + +#define DT2_88F5182_FREECOM_MPP0_7 0x55000003 +#define DT2_88F5182_FREECOM_MPP8_15 0x11110010 +#define DT2_88F5182_FREECOM_MPP16_23 0x1111 + +#define DT2_88F5182_FREECOM_INFO { \ + \ + "Freecom DataTank Gateway", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {DT2_88F5182_FREECOM_MPP0_7, /* mpp0_7 */ \ + DT2_88F5182_FREECOM_MPP8_15, /* mpp8_15 */ \ + DT2_88F5182_FREECOM_MPP16_23, /* mpp16_23 */ \ + N_A}, /* mppDev */ \ + \ + /* ((1<<1) | */ ((1<<2) | (1<<3)), /* | (1<<4) | (1<<5)), */ /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fdfffff, BOARD_DEV_DISPLAY_LED, 16}, /* devCs0 (LCD-I/O) */ \ + { 0x8fdfffff, BOARD_DEV_NOR_FLASH, 16}, /* devCs1 (BIG-Flash) */ \ + { 0x8fdfffff, BOARD_DEV_DISPLAY_LCD, 16}, /* devCs2 (LED-I/O) */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs (BOOT-Flash) */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{0x7, /* firstSlotDevNum */ \ + 1, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {3, 2, N_A, N_A}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x6F, /* rtcTwsiAddr (ISL1208) */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x0}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */ \ + \ + 0, /* rtcIntPin */ \ + 1, /* switchIntPin */ \ + {10,11}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */\ + \ + N_A, /* activeLedsNumber */ \ + \ + {N_A, /* led0GppPin */ \ + N_A, /* led1GppPin */ \ + N_A, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + N_A, /* ledsPolarity */ \ + N_A /* refClkGppPin */ \ +} + + + +#endif /* __INCmvBoardEnvSpech */ diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/boardEnv/mvBoardEnvLib.c linux-88fxx81/arch/arm/mach-mv88fxx81/Board/boardEnv/mvBoardEnvLib.c --- linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/boardEnv/mvBoardEnvLib.c 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/mach-mv88fxx81/Board/boardEnv/mvBoardEnvLib.c 2007-04-13 18:29:12.000000000 +0930 @@ -0,0 +1,1603 @@ +/******************************************************************************* +Copyright (C) Marvell International Ltd. and its affiliates + +This software file (the "File") is owned and distributed by Marvell +International Ltd. and/or its affiliates ("Marvell") under the following +alternative licensing terms. Once you have made an election to distribute the +File under one of the following license alternatives, please (i) delete this +introductory statement regarding license alternatives, (ii) delete the two +license alternatives that you have not elected to use and (iii) preserve the +Marvell copyright notice above. + +******************************************************************************** +Marvell Commercial License Option + +If you received this File from Marvell and you have entered into a commercial +license agreement (a "Commercial License") with Marvell, the File is licensed +to you under the terms of the applicable Commercial License. + +******************************************************************************** +Marvell GPL License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File in accordance with the terms and conditions of the General +Public License Version 2, June 1991 (the "GPL License"), a copy of which is +available along with the File in the license.txt file or by writing to the Free +Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or +on the worldwide web at http://www.gnu.org/licenses/gpl.txt. + +THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED +WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY +DISCLAIMED. The GPL License provides additional details about this warranty +disclaimer. +******************************************************************************** +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + * Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#include "mvBoardEnvLib.h" +#include "mvCtrlEnvSpec.h" +#include "mvCpuIf.h" +#include "mvCntmr.h" +#include "mvDevice.h" +#include "mvGpp.h" +#include "mvPciIf.h" + +/* defines */ +#ifdef MV_DEBUG + #define DB(x) x +#else + #define DB(x) +#endif + + + +#define CODE_IN_ROM MV_FALSE +#define CODE_IN_RAM MV_TRUE + + + +#if defined(MV_88F5182) + + +MV_U32 boardIdToIndex[MV_MAX_BOARD_ID] ={ N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + 0, + 1, + N_A, + N_A, + N_A, + 2, + N_A, + N_A, + N_A, + N_A, + 3 + }; + +MV_BOARD_INFO mv88F5182InfoTbl[4] ={DB_88F5182_DDR2_INFO, + RD_88F5182_2XSATA_INFO, + RD_88F5182_2XSATA3_INFO, + DT2_88F5182_FREECOM_INFO + }; + + +#elif defined(RD_DB_88F5181L) + +MV_U32 boardIdToIndex[MV_MAX_BOARD_ID] ={ N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + 0, + 1, + 2 + }; + +MV_BOARD_INFO mv88F5181LInfoTbl[3]={DB_88F5181L_DDR2_2XTDM_INFO, + RD_88F5181L_VOIP_FE_INFO, + RD_88F5181L_VOIP_GE_INFO + }; +#elif defined(MV_88W8660) + +MV_U32 boardIdToIndex[MV_MAX_BOARD_ID] ={ N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, + N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, + 0, 1, 2}; + + +MV_BOARD_INFO mv88w8660InfoTbl[3]= { DB_88W8660_DDR2_INFO, RD_88W8660_DDR1_INFO, RD_88W8660_AP82S_INFO}; + +#else + +MV_U32 boardIdToIndex[MV_MAX_BOARD_ID] ={ DB_88F1181_DDR1, + DB_88F1181_DDR2, + DB_88F5181_5281_DDR1, + DB_88F5181_5281_DDR2, + DB_88F5181_DDR1_PRPMC, + DB_88F5181_DDR1_PEXPCI, + RD_88F5181_POS_NAS, + DB_88F5X81_DDR2, + DB_88F5X81_DDR1, + RD_88F5181_VOIP, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + N_A, + 10 + }; + + +MV_BOARD_INFO defBoardInfoTbl[MV_MAX_BOARD_ID] ={ DB_88F1181_DDR1_INFO, + DB_88F1181_DDR2_INFO, + DB_88F5181_5281_DDR1_INFO, + DB_88F5181_5281_DDR2_INFO, + DB_88F5181_DDR1_PRPMC_INFO, + DB_88F5181_DDR1_PEXPCI_INFO, + RD_88F5181_POS_NAS_INFO, + DB_88F5X81_DDR2_INFO, + DB_88F5X81_DDR1_INFO, + RD_88F5181_VOIP_INFO, + DB_88F5181_DDR1_MNG_INFO + }; + + +#endif + + +#if defined(MV_88F5182) +#define MV_CURRENT_TABLE_INFO mv88F5182InfoTbl + +#elif defined(RD_DB_88F5181L) + +#define MV_CURRENT_TABLE_INFO mv88F5181LInfoTbl + +#elif defined(MV_88W8660) + +#define MV_CURRENT_TABLE_INFO mv88w8660InfoTbl + +#else + +#define MV_CURRENT_TABLE_INFO defBoardInfoTbl +#endif + +#define BOARD_INFO boardInfoTbl[boardIdToIndex[boardId]] + + +/* Locals */ +MV_VOID refClkInit(MV_VOID); +MV_VOID refClkWaitForLow(MV_VOID); +MV_VOID refClkWaitNCycles(MV_U32 cycles); +MV_U32 boardGetDevCSNum(MV_32 devNum, MV_BOARD_DEV_TYPE devType); + + +/******************************************************************************* +* mvBoardEnvInit - Init board +* +* DESCRIPTION: +* In this function the board environment take care of device bank +* initialization. +* +* INPUT: +* None. +* +* OUTPUT: +* None. +* +* RETURN: +* None. +* +*******************************************************************************/ +MV_VOID mvBoardEnvInit(MV_VOID) +{ + MV_U32 devNum; + MV_U32 devBankParam=0; + MV_U32 boardId= mvBoardIdGet(); + MV_U32 deviceId= mvCtrlModelGet(); + MV_BOARD_INFO *boardInfoTbl=NULL; +#ifndef MV_88W8660 + MV_U32 regVal; +#endif /* MV_88W8660 */ + int i; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + if (boardId > MV_MAX_BOARD_ID) + { + mvOsPrintf("mvBoardEnvInit:Board unknown.\n"); + return; + + } + + /* set GPP Out enable for debug Leds. Check if Debug leds used via GPP */ + if (BOARD_INFO.ledGppPin[0] != (MV_U8)N_A) + { + for (i = 0; i < BOARD_INFO.activeLedsNumber; i++) + { + mvGppOutEnablle(0, 1 << BOARD_INFO.ledGppPin[i], 0); + } + } + + if(DB_88F5181_5281_DDR2 == boardId) + { + /* Set GPP Out Enable*/ + mvGppOutEnablle(0, 0xFFFFFFFF, 0xFFFF3717); + + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFFFFF, 0x3002); + } + else if(DB_88F5181_5281_DDR1 == boardId) + { + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFFFFF, 0xc0); + } + else if((DB_88F5X81_DDR2 == boardId)|| + (DB_88F5X81_DDR1 == boardId)) + { + /* Set GPP Out Enable*/ + mvGppOutEnablle(0, 0xFFFFFFFF, 0xFFFDFF17); + + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFFFFF, 0x3400); + } + else if (DB_88F5182_DDR2 == boardId) + { + /* Set GPP Out Enable*/ + mvGppOutEnablle(0, 0xFFFFFFFF, 0xFFF5FFD7); + + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFFFFF, 0x403); + + } + else if (RD_88F5182_2XSATA == boardId) + { + /* Set GPP Out Enable*/ + mvGppOutEnablle(0, 0xFFFFFFFF, 0xFFF0F0CA); + + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFFFFF, 0xd0); + + } + else if (RD_88F5182_2XSATA3 == boardId) + { + + /* Set GPP Out Enable*/ + mvGppOutEnablle(0, 0xFFFFFFFF, 0xFFCF0EF8); + + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFFFFF, 0x80); + + /* Set High GPP 2 */ + mvGppValueSet (0, (1 << 2), (1 << 2)); + + } + else if(DB_88F5181_DDR1_PRPMC == boardId) + { + /* check MONARCHn*/ + if (MV_GPP2 == mvGppValueGet(0,MV_GPP2)) + { + /* set GPP Out enable */ + MV_REG_WRITE(0x10104,0xFFFF8F4C); + + /* set GPP polarity */ + MV_REG_WRITE(0x1010C,0x0000000C); + + } + else + { + /* set GPP Out enable */ + MV_REG_WRITE(0x10104,0xFFFF8FFC); + + /* set GPP polarity */ + MV_REG_WRITE(0x1010C,0x000000FC); + + } + } + else if(DB_88F5181_DDR1_MNG == boardId) + { + /* set GPP Out enable */ + MV_REG_WRITE(0x10104,0xFFFF8FF8); + + /* set GPP polarity */ + MV_REG_WRITE(0x1010C,0x000000E8); + + } + else if (DB_88F5181_DDR1_PEXPCI == boardId) + { + + /* set GPP Out enable */ + mvGppOutEnablle(0,MV_GPP0|MV_GPP12|MV_GPP13|MV_GPP14|MV_GPP15,0); + + /* Pex reset out*/ + mvGppValueSet(0,MV_GPP0,1); + + } + else if (DB_88F5181L_DDR2_2XTDM == boardId) + { + /* Set GPP Out Enable*/ + mvGppOutEnablle(0, 0xFFFFFFFF, 0xFFFDFFD7); + + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFFFFF, 0x3700); + + } + else if (RD_88F5181L_VOIP_FE == boardId) + { + /* Set GPP Out Enable*/ + mvGppOutEnablle(0, 0xFFFFFFFF, 0xFFFF0FFC); + + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFFFFF, 0xA3C); + + } + else if (RD_88F5181L_VOIP_GE == boardId) + { + /* Set GPP Out Enable*/ + mvGppOutEnablle(0, 0xFFFFFFFF, 0xFFFF07F0); + + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFFFFF, 0x530); + + } + else if (DB_88W8660_DDR2 == boardId) + { + /* Set GPP Out Enable*/ + mvGppOutEnablle(0, 0xFFFFF, 0xFFF5); + + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFF, 0xE00); + + } + else if (RD_88W8660_DDR1 == boardId) + { + /* Set GPP Out Enable*/ + mvGppOutEnablle(0, 0xFFFFF, 0xFFF1C); + + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFF, 0xA18); + + /* Clock Run */ + mvGppValueSet(0, MV_GPP1, MV_GPP1); + + } + else if (RD_88W8660_AP82S_DDR1 == boardId) + { + /* Set GPP Out Enable*/ + mvGppOutEnablle(0, 0xFFFFF, RD_88W8660_AP82S_MPP_OUT_EN); + + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFF, RD_88W8660_AP82S_MPP_POLAR); + + /* Clock Run */ + mvGppValueSet(0, MV_GPP7, MV_GPP7); + + } + else if (DT2_88F5182_FREECOM == boardId) + { + + /* Set GPP Out Enable*/ + mvGppOutEnablle(0, 0xFFFFFFFF, 0xFFFF0F3F); + + /* set GPP polarity */ + mvGppPolaritySet(0, 0xFFFFFFFF, 0x3C0013D); + + /* set GPP Blink enable */ + mvGppBlinkEn(0, 0x000000C0, 0x000000C0); + + /* Set High GPP 2 */ +// mvGppValueSet (0, (1 << 2), (1 << 2)); + + } + for (devNum = START_DEV_CS; devNum < MV_DEV_MAX_CS; devNum++) + { + devBankParam = BOARD_INFO.devCsInfo[devNum].params; + + if (devBankParam == N_A) continue; + + if (devNum != BOOT_CS) + { + MV_REG_WRITE(DEV_BANK_PARAM_REG(devNum), devBankParam); + } + else + { + MV_U32 bootDevBankParam; + + /* for BootCS Only device width should be as in sample at + reset */ + bootDevBankParam = MV_REG_READ(DEV_BOOT_BANK_PARAM_REG); + bootDevBankParam &= DBP_DEVWIDTH_MASK; + devBankParam &= ~DBP_DEVWIDTH_MASK; + devBankParam |= bootDevBankParam; + + MV_REG_WRITE(DEV_BOOT_BANK_PARAM_REG , devBankParam); + } + } + + /* NAND flash stuff */ + if((deviceId == MV_5281_DEV_ID) || /* Orion2 */ + (deviceId == MV_5182_DEV_ID) || /* OrionNAS */ + (deviceId == MV_5082_DEV_ID) || + (deviceId == MV_8660_DEV_ID) || /* 88w8660 */ + ((deviceId == MV_5181_DEV_ID) && (mvCtrlRevGet() >= 0x8))) /* Orion1L */ + { + + /* If we are booting from NAND MPPs should be modified */ + /* Check NAND connected to boot device */ + if (MV_REG_READ(DEV_NAND_CTRL_REG) & 0x1) + { + boardInfoTbl[boardIdToIndex[boardId]].mppGroup[0] &= 0xFF00FFFF; + boardInfoTbl[boardIdToIndex[boardId]].mppGroup[0] |= 0x00440000; + boardInfoTbl[boardIdToIndex[boardId]].mppGroup[1] &= 0x00FFFFFF; + } + else + { + if (boardGetDevCSNum(0, BOARD_DEV_NAND_FLASH) != 0xffffffff) + { + /* We always use care mode. */ + mvDevNandSet(boardGetDevCSNum(0, BOARD_DEV_NAND_FLASH), 1); + } + } + } + +#ifndef MV_88W8660 + /* Guideline (GL# ETH-3) RGMII Output Delay Tuning*/ + + /* Read if we are in RGMII mode */ + regVal = MV_REG_READ(MPP_SAMPLE_AT_RESET); + + /* Check if we are in RGMII mode */ + if (MSAR_GIGA_PORT_MODE_RGMII == (regVal & MSAR_GIGA_PORT_MODE_MASK)) + { + + regVal = MV_REG_READ(DEV_RGMII_AC_TIMING_REG); + regVal &= ~0x3; + regVal |= 0x2; + MV_REG_WRITE(DEV_RGMII_AC_TIMING_REG, regVal); + } +#endif + +} + +/* maen : all board ID functions should be updated */ +/******************************************************************************* +* mvBoardModelGet - Get Board model +* +* DESCRIPTION: +* This function returns 16bit describing board model. +* Board model is constructed of one byte major and minor numbers in the +* following manner: +* +* INPUT: +* None. +* +* OUTPUT: +* None. +* +* RETURN: +* String describing board model. +* +*******************************************************************************/ +MV_U16 mvBoardModelGet(MV_VOID) +{ + return (mvBoardIdGet() >> 16); +} + +/******************************************************************************* +* mbBoardRevlGet - Get Board revision +* +* DESCRIPTION: +* This function returns a 32bit describing the board revision. +* Board revision is constructed of 4bytes. 2bytes describes major number +* and the other 2bytes describes minor munber. +* For example for board revision 3.4 the function will return +* 0x00030004. +* +* INPUT: +* None. +* +* OUTPUT: +* None. +* +* RETURN: +* String describing board model. +* +*******************************************************************************/ +MV_U16 mvBoardRevGet(MV_VOID) +{ + return (mvBoardIdGet() & 0xFFFF); +} + +/******************************************************************************* +* mvBoardNameGet - Get Board name +* +* DESCRIPTION: +* This function returns a string describing the board model and revision. +* String is extracted from board I2C EEPROM. +* +* INPUT: +* None. +* +* OUTPUT: +* pNameBuff - Buffer to contain board name string. Minimum size 32 chars. +* +* RETURN: +* +* MV_ERROR if informantion can not be read. +*******************************************************************************/ +MV_STATUS mvBoardNameGet(char *pNameBuff) +{ + MV_U32 boardId= mvBoardIdGet(); + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + if (boardId > MV_MAX_BOARD_ID) + { + mvOsSPrintf (pNameBuff, "Board unknown.\n"); + return MV_ERROR; + + } + + mvOsSPrintf (pNameBuff, "%s",BOARD_INFO.boardName); + + return MV_OK; +} + +/******************************************************************************* +* mvBoardIsPortInSgmii - +* +* DESCRIPTION: +* This routine returns MV_TRUE for port number works in SGMII or MV_FALSE +* For all other options. +* +* INPUT: +* ethPortNum - Ethernet port number. +* +* OUTPUT: +* None. +* +* RETURN: +* MV_TRUE - port in SGMII. +* MV_FALSE - other. +* +*******************************************************************************/ +MV_BOOL mvBoardIsPortInSgmii(MV_U32 ethPortNum) +{ + MV_BOOL ethPortSgmiiSupport[BOARD_ETH_PORT_NUM] = MV_ETH_PORT_SGMII; + + if(ethPortNum >= BOARD_ETH_PORT_NUM) + { + mvOsPrintf ("Invalid portNo=%d\n", ethPortNum); + return MV_FALSE; + } + return ethPortSgmiiSupport[ethPortNum]; +} + +/******************************************************************************* +* mvBoardPhyAddrGet - Get the phy address +* +* DESCRIPTION: +* This routine returns the Phy address of a given ethernet port. +* +* INPUT: +* ethPortNum - Ethernet port number. +* +* OUTPUT: +* None. +* +* RETURN: +* 32bit describing Phy address, '-1' if the port number is wrong. +* +*******************************************************************************/ +MV_U32 mvBoardPhyAddrGet(MV_U32 ethPortNum) +{ + MV_U32 boardId= mvBoardIdGet(); + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + if (boardId > MV_MAX_BOARD_ID) + { + mvOsPrintf("mvBoardPhyAddrGet:Board unknown.\n"); + return MV_ERROR; + + } + + return BOARD_INFO.ethPhyAddr[ethPortNum]; +} + +/******************************************************************************* +* mvBoardTclkGet - Get the board Tclk (Controller clock) +* +* DESCRIPTION: +* This routine extract the controller core clock. +* This function uses the controller counters to make identification. +* Note: In order to avoid interference, make sure task context switch +* and interrupts will not occure during this function operation +* +* INPUT: +* countNum - Counter number. +* +* OUTPUT: +* None. +* +* RETURN: +* 32bit clock cycles in Hertz. +* +*******************************************************************************/ +MV_U32 mvBoardTclkGet(MV_VOID) +{ + + MV_U32 tmpTClkRate=0; + +#ifdef TCLK_AUTO_DETECT + + tmpTClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET); + + tmpTClkRate &= MSAR_TCLCK_MASK; + + switch (tmpTClkRate) + { + case MSAR_TCLCK_133: + tmpTClkRate = _133MHz; + break; + case MSAR_TCLCK_150: + tmpTClkRate = _150MHz; + break; + case MSAR_TCLCK_166: + tmpTClkRate = _166MHz; + break; + default: + tmpTClkRate = _100MHz; + break; + } + +#else + + tmpTClkRate = MV_BOARD_DEFAULT_TCLK; + +#endif + + return tmpTClkRate; + +} +/******************************************************************************* +* mvBoardSysClkGet - Get the board SysClk (CPU bus clock) +* +* DESCRIPTION: +* This routine extract the CPU bus clock. +* +* INPUT: +* countNum - Counter number. +* +* OUTPUT: +* None. +* +* RETURN: +* 32bit clock cycles in Hertz. +* +*******************************************************************************/ +MV_U32 mvBoardSysClkGet(MV_VOID) +{ + MV_U32 tmpSysClkRate=0; + MV_U32 tmp; + +#ifdef SYSCLK_AUTO_DETECT + + tmp = MV_REG_READ(MPP_SAMPLE_AT_RESET); + + tmpSysClkRate = tmp & MSAR_ARMDDRCLCK_MASK; + + if (mvCtrlModelGet() == MV_5281_DEV_ID) + if(tmp & MSAR_ARMDDRCLCK_H_MASK) + tmpSysClkRate |= BIT8; + + switch (tmpSysClkRate) + { + case MSAR_ARMDDRCLCK_333_167: + tmpSysClkRate = _166MHz; + break; + case MSAR_ARMDDRCLCK_400_200: + tmpSysClkRate = _200MHz; + break; + case MSAR_ARMDDRCLCK_400_133: + tmpSysClkRate = _133MHz; + break; + case MSAR_ARMDDRCLCK_500_167: + tmpSysClkRate = _166MHz; + break; + case MSAR_ARMDDRCLCK_533_133: + tmpSysClkRate = _133MHz; + break; + case MSAR_ARMDDRCLCK_600_200: + tmpSysClkRate = _200MHz; + break; + case MSAR_ARMDDRCLCK_667_167: + tmpSysClkRate = _166MHz; + break; + case MSAR_ARMDDRCLCK_800_200: + tmpSysClkRate = _200MHz; + break; + case MSAR_ARMDDRCLCK_550_183: + tmpSysClkRate = _183MHz; + break; + case MSAR_ARMDDRCLCK_480_160: + tmpSysClkRate = _160MHz; + break; + case MSAR_ARMDDRCLCK_466_233: + tmpSysClkRate = _233MHz; + break; + case MSAR_ARMDDRCLCK_500_250: + tmpSysClkRate = _250MHz; + break; + case MSAR_ARMDDRCLCK_525_175: + tmpSysClkRate = _175MHz; + break; + case MSAR_ARMDDRCLCK_533_266: + tmpSysClkRate = _266MHz; + break; + case MSAR_ARMDDRCLCK_600_300: + tmpSysClkRate = _300MHz; + break; + case MSAR_ARMDDRCLCK_450_150: + tmpSysClkRate = _150MHz; + break; + case MSAR_ARMDDRCLCK_533_178: + tmpSysClkRate = _178MHz; + break; + case MSAR_ARMDDRCLCK_575_192: + tmpSysClkRate = _192MHz; + break; + case MSAR_ARMDDRCLCK_700_175: + tmpSysClkRate = _175MHz; + break; + case MSAR_ARMDDRCLCK_733_183: + tmpSysClkRate = _183MHz; + break; + case MSAR_ARMDDRCLCK_750_187: + tmpSysClkRate = _187MHz; + break; + case MSAR_ARMDDRCLCK_775_194: + tmpSysClkRate = _194MHz; + break; + case MSAR_ARMDDRCLCK_500_125: + tmpSysClkRate = _125MHz; + break; + case MSAR_ARMDDRCLCK_500_100: + tmpSysClkRate = _100MHz; + break; + case MSAR_ARMDDRCLCK_600_150: + tmpSysClkRate = _150MHz; + break; + } + +#else + tmpSysClkRate = MV_BOARD_DEFAULT_SYSCLK; +#endif + + return tmpSysClkRate; +} + + +/******************************************************************************* +* mvBoardPexBridgeIntPinGet - Get PEX to PCI bridge interrupt pin number +* +* DESCRIPTION: +* Multi-ported PCI Express bridges that is implemented on the board +* collapse interrupts across multiple conventional PCI/PCI-X buses. +* A dual-headed PCI Express bridge would map (or "swizzle") the +* interrupts per the following table (in accordance with the respective +* logical PCI/PCI-X bridge's Device Number), collapse the INTA#-INTD# +* signals from its two logical PCI/PCI-X bridges, collapse the +* INTA#-INTD# signals from any internal sources, and convert the +* signals to in-band PCI Express messages. 10 +* This function returns the upstream interrupt as it was converted by +* the bridge, according to board configuration and the following table: +* PCI dev num +* Interrupt pin 7, 8, 9 +* A -> A D C +* B -> B A D +* C -> C B A +* D -> D C B +* +* +* INPUT: +* devNum - PCI/PCIX device number. +* intPin - PCI Int pin +* +* OUTPUT: +* None. +* +* RETURN: +* Int pin connected to the Interrupt controller +* +*******************************************************************************/ +MV_U32 mvBoardPexBridgeIntPinGet(MV_U32 devNum, MV_U32 intPin) +{ + MV_U32 realIntPin = ((intPin + (3 - (devNum % 4))) %4 ); + + if (realIntPin == 0) return 4; + else return realIntPin; + +} + +#ifdef CONFIG_LEDS +/******************************************************************************* +* mvBoardDebug7Seg - Set the board debug 7Seg +* +* DESCRIPTION: +* +* INPUT: +* hexNum - Number to be displied in hex by 7Seg. +* +* OUTPUT: +* None. +* +* RETURN: +* None. +* +*******************************************************************************/ +MV_VOID mvBoardDebug7Seg(MV_U32 hexNum) +{ + MV_U32 boardId, + addr,val = 0,totalMask, + currentBitMask = 1,i; + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + boardId = mvBoardIdGet(); + + if (boardId > MV_MAX_BOARD_ID) + { + mvOsPrintf("mvBoardDebug7Seg:Board unknown.\n"); + return; + + } + + totalMask = (1 << BOARD_INFO.activeLedsNumber) -1; + hexNum &= totalMask; + totalMask = 0; + + /* Check if LED-PANEL is wired to CS */ + addr = mvBoardGetDeviceBaseAddr(0, BOARD_DEV_DISPLAY_LCD); + + if (addr != 0xFFFFFFFF) + { + if (hexNum < 8) hexNum=(1< MV_MAX_BOARD_ID) + { + mvOsPrintf("mvBoardPciGpioPinGet:Board ID %d unknown.\n", boardId); + return MV_ERROR; + + } + + if ((DB_88F5181_DDR1_PRPMC == boardId) || + (DB_88F5181_DDR1_MNG == boardId) || + (DB_88F5181_DDR1_PEXPCI == boardId)) + { + /* These boards are NOT backplans. PCI interrupt connectivity */ + /* information of a specifc user backplain, which to install */ + /* those boards, is unknown. */ + /* Marvell general HAL provides default PCI definition for */ + /* these add-in cards. Each user should modify this */ + /* configuration according to the backplain in use. */ + + if (DB_88F5181_DDR1_MNG == boardId) + { + /* device 0 is the packet processor device */ + if (devNum == 0) + { + /* check monarch */ + if (mvBoardPciIsMonarch()) { + /* We use internal arbiter. use mpp 3 */ + return (MV_U32)BOARD_INFO.pciBoardIf[pciIf].pciSlot[2].pciSlotGppIntMap[intPin - 1]; + } else { + /* We do not use internal arbiter. use mpp 7 */ + return (MV_U32)BOARD_INFO.pciBoardIf[pciIf].pciSlot[0].pciSlotGppIntMap[intPin - 1]; + } + + } else { + return (MV_U32)BOARD_INFO.pciBoardIf[pciIf].pciSlot[1].pciSlotGppIntMap[intPin - 1]; + + } + } + + return (MV_U32)BOARD_INFO.pciBoardIf[pciIf].pciSlot[0].pciSlotGppIntMap[intPin - 1]; + } + + if (BOARD_INFO.pciBoardIf[pciIf].pciSlotsNum == (MV_U8)N_A) + { + mvOsPrintf("mvBoardPciGpioPinGet: ERR. Could not find GPP pin " \ + "assignment for pciIf %d devNum %d intPin %d\n", + pciIf, devNum, intPin); + return N_A; + } + + if ((devNum <(MV_U32) BOARD_INFO.pciBoardIf[pciIf].firstSlotDevNum )|| + (devNum >= (MV_U32)BOARD_INFO.pciBoardIf[pciIf].firstSlotDevNum + + (MV_U32)BOARD_INFO.pciBoardIf[pciIf].pciSlotsNum)) + { + + mvOsPrintf("mvBoardPciGpioPinGet:Illigal device number %d\n", devNum); + return N_A; + + } + slotNumber = devNum - BOARD_INFO.pciBoardIf[pciIf].firstSlotDevNum; + + return (MV_U32)BOARD_INFO.pciBoardIf[pciIf].pciSlot[slotNumber].pciSlotGppIntMap[intPin - 1]; + + +} + +/******************************************************************************* +* mvBoardRTCGpioPinGet - mvBoardRTCGpioPinGet +* +* DESCRIPTION: +* +* INPUT: +* None. +* +* OUTPUT: +* None. +* +* RETURN: +* GPIO pin number. The function return -1 for bad parameters. +* +*******************************************************************************/ +MV_U32 mvBoardRTCGpioPinGet(MV_VOID) +{ + MV_U32 boardId; + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + boardId = mvBoardIdGet(); + + if (boardId > MV_MAX_BOARD_ID) + { + mvOsPrintf("mvBoardRTCGpioPinGet:Board unknown.\n"); + return MV_ERROR; + + } + + return BOARD_INFO.rtcIntPin; +} + +/******************************************************************************* +* mvBoardUSBVbusGpioPinGet - return Vbus input GPP +* +* DESCRIPTION: +* +* INPUT: +* int devNo. +* +* OUTPUT: +* None. +* +* RETURN: +* GPIO pin number. The function return -1 for bad parameters. +* +*******************************************************************************/ +MV_U32 mvBoardUSBVbusGpioPinGet(int devId) +{ + MV_U32 boardId; + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + boardId = mvBoardIdGet(); + + if (boardId > MV_MAX_BOARD_ID) + { + mvOsPrintf("mvBoardUSBVbusGpioPinGet:Board unknown.\n"); + return MV_ERROR; + + } + + return BOARD_INFO.vbusUsbGppPin[devId]; +} + + +/******************************************************************************* +* mvBoardGpioIntMaskGet - Get GPIO mask for interrupt pins +* +* DESCRIPTION: +* This function returns a 32-bit mask of GPP pins that connected to +* interrupt generating sources on board. +* For example if UART channel A is hardwired to GPP pin 8 and +* UART channel B is hardwired to GPP pin 4 the fuinction will return +* the value 0x000000110 +* +* INPUT: +* None. +* +* OUTPUT: +* None. +* +* RETURN: +* See description. The function return -1 if board is not identified. +* +*******************************************************************************/ +MV_U32 mvBoardGpioIntMaskGet(MV_VOID) +{ + MV_U32 boardId; + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + boardId = mvBoardIdGet(); + + if (boardId > MV_MAX_BOARD_ID) + { + mvOsPrintf("mvBoardGpioIntMaskGet:Board unknown.\n"); + return MV_ERROR; + + } + + return BOARD_INFO.intsGppMask; +} + +/******************************************************************************* +* mvBoardMppGet - Get board dependent MPP register value +* +* DESCRIPTION: +* MPP settings are derived from board design. +* MPP group consist of 8 MPPs. An MPP group represent MPP +* control register. +* This function retrieves board dependend MPP register value. +* +* INPUT: +* mppGroupNum - MPP group number. +* +* OUTPUT: +* None. +* +* RETURN: +* 32bit value describing MPP control register value. +* +*******************************************************************************/ +MV_U32 mvBoardMppGet(MV_U32 mppGroupNum) +{ + MV_U32 boardId; + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + boardId = mvBoardIdGet(); + + if (boardId > MV_MAX_BOARD_ID) + { + mvOsPrintf("mvBoardMppGet:Board unknown.\n"); + return MV_ERROR; + + } + + return BOARD_INFO.mppGroup[mppGroupNum]; +} + + +/* Board devices API managments */ + +/******************************************************************************* +* mvBoardGetDeviceNumber - Get number of device of some type on the board +* +* DESCRIPTION: +* +* INPUT: +* devType - The device type ( Flash,RTC , etc .. ) +* +* OUTPUT: +* None. +* +* RETURN: +* If the device is found on the board the then the functions returns the +* number of those devices else the function returns 0 +* +* +*******************************************************************************/ +MV_32 mvBoardGetDevicesNumber(MV_BOARD_DEV_TYPE devType) +{ + MV_U32 foundIndex=0,devNum; + MV_U32 boardId= mvBoardIdGet(); + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + if (boardId > MV_MAX_BOARD_ID) + { + mvOsPrintf("mvBoardGetDeviceNumber:Board unknown.\n"); + return 0xFFFFFFFF; + + } + + for (devNum = START_DEV_CS; devNum < MV_DEV_MAX_CS; devNum++) + { + if (BOARD_INFO.devCsInfo[devNum].devType == devType) + { + foundIndex++; + } + } + + return foundIndex; + +} + +/******************************************************************************* +* mvBoardGetDeviceBaseAddr - Get base address of a device existing on the board +* +* DESCRIPTION: +* +* INPUT: +* devIndex - The device sequential number on the board +* devType - The device type ( Flash,RTC , etc .. ) +* +* OUTPUT: +* None. +* +* RETURN: +* If the device is found on the board the then the functions returns the +* Base address else the function returns 0xffffffff +* +* +*******************************************************************************/ +MV_32 mvBoardGetDeviceBaseAddr(MV_32 devIndex, MV_BOARD_DEV_TYPE devType) +{ + MV_32 devNum; + + devNum = boardGetDevCSNum(devIndex,devType); + + if (devNum != 0xFFFFFFFF) + { + return mvCpuIfTargetWinBaseLowGet(DEV_TO_TARGET(devNum)); + + } + + return 0xFFFFFFFF; +} + +/******************************************************************************* +* mvBoardGetDeviceBusWidth - Get Bus width of a device existing on the board +* +* DESCRIPTION: +* +* INPUT: +* devIndex - The device sequential number on the board +* devType - The device type ( Flash,RTC , etc .. ) +* +* OUTPUT: +* None. +* +* RETURN: +* If the device is found on the board the then the functions returns the +* Bus width else the function returns 0xffffffff +* +* +*******************************************************************************/ +MV_32 mvBoardGetDeviceBusWidth(MV_32 devIndex, MV_BOARD_DEV_TYPE devType) +{ + MV_32 devNum; + + devNum = boardGetDevCSNum(devIndex,devType); + + if (devNum != 0xFFFFFFFF) + { + return mvDevWidthGet(devNum); + + } + + return 0xFFFFFFFF; + +} + +/******************************************************************************* +* mvBoardGetDeviceWidth - Get dev width of a device existing on the board +* +* DESCRIPTION: +* +* INPUT: +* devIndex - The device sequential number on the board +* devType - The device type ( Flash,RTC , etc .. ) +* +* OUTPUT: +* None. +* +* RETURN: +* If the device is found on the board the then the functions returns the +* dev width else the function returns 0xffffffff +* +* +*******************************************************************************/ +MV_32 mvBoardGetDeviceWidth(MV_32 devIndex, MV_BOARD_DEV_TYPE devType) +{ + MV_32 devNum; + MV_U32 boardId= mvBoardIdGet(); + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + if (boardId > MV_MAX_BOARD_ID) + { + mvOsPrintf("Board unknown.\n"); + return 0xFFFFFFFF; + + } + + devNum = boardGetDevCSNum(devIndex,devType); + + if (devNum != 0xFFFFFFFF) + { + return BOARD_INFO.devCsInfo[devNum].devWidth; + + } + + return 0xFFFFFFFF; + +} + +/******************************************************************************* +* boardGetDevCSNum - returns the Device CS number of a device on the board +* +* DESCRIPTION: +* +* INPUT: +* devIndex - The device sequential number on the board +* devType - The device type ( Flash,RTC , etc .. ) +* +* OUTPUT: +* None. +* +* RETURN: +* If the device is found on the board the then the functions returns the +* dev number else the function returns 0xffffffff +* +* +*******************************************************************************/ +MV_U32 boardGetDevCSNum(MV_32 devIndex, MV_BOARD_DEV_TYPE devType) +{ + MV_U32 foundIndex=0,devNum; + MV_U32 boardId= mvBoardIdGet(); + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + if (boardId > MV_MAX_BOARD_ID) + { + mvOsPrintf("boardGetDevCSNum: Board unknown.\n"); + return 0xFFFFFFFF; + + } + + /* because some restrictions like in U-boot that always expect the BootFlash to be + the first flash - we want always the Boot CS to be the first device of its kind , + so we always will start searching from there and then search the other */ + + if (BOARD_INFO.devCsInfo[BOOT_CS].devType == devType) + { + if (foundIndex == devIndex) return BOOT_CS; + foundIndex++; + } + + for (devNum = START_DEV_CS; devNum < MV_DEV_MAX_CS; devNum++) + { + + if (devNum == BOOT_CS) continue; + + if (BOARD_INFO.devCsInfo[devNum].devType == devType) + { + if (foundIndex == devIndex) + { + return devNum; + } + foundIndex++; + } + } + + /* device not found */ + return 0xFFFFFFFF; + + +} + +/******************************************************************************* +* mvBoardRtcTwsiAddrTypeGet - +* +* DESCRIPTION: +* +* INPUT: +* +* OUTPUT: +* None. +* +* RETURN: +* +* +*******************************************************************************/ +MV_U8 mvBoardRtcTwsiAddrTypeGet() +{ + MV_U32 boardId; + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + boardId = mvBoardIdGet(); + return BOARD_INFO.rtcTwsiAddrType; +} + +/******************************************************************************* +* mvBoardRtcTwsiAddrGet - +* +* DESCRIPTION: +* +* INPUT: +* +* OUTPUT: +* None. +* +* RETURN: +* +* +*******************************************************************************/ +MV_U8 mvBoardRtcTwsiAddrGet() +{ + MV_U32 boardId; + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + boardId = mvBoardIdGet(); + return BOARD_INFO.rtcTwsiAddr; +} + +/******************************************************************************* +* mvBoardFirstPciSlotDevNumGet - +* +* DESCRIPTION: +* +* INPUT: +* +* OUTPUT: +* None. +* +* RETURN: +* +* +*******************************************************************************/ +MV_U32 mvBoardFirstPciSlotDevNumGet(MV_U32 pciIf) +{ + MV_U32 boardId; + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + boardId = mvBoardIdGet(); + return BOARD_INFO.pciBoardIf[pciIf].firstSlotDevNum; +} + +/******************************************************************************* +* mvBoardPciSlotsNumGet - +* +* DESCRIPTION: +* +* INPUT: +* +* OUTPUT: +* None. +* +* RETURN: +* +* +*******************************************************************************/ +MV_U32 mvBoardPciSlotsNumGet(MV_U32 pciIf) +{ + MV_U32 boardId; + MV_BOARD_INFO *boardInfoTbl=NULL; + + boardInfoTbl = MV_CURRENT_TABLE_INFO; + + boardId = mvBoardIdGet(); + return BOARD_INFO.pciBoardIf[pciIf].pciSlotsNum; +} + +/******************************************************************************* +* mvBoardPciIsMonarch - +* +* DESCRIPTION: +* This function is target to PRPMC type boards. In those boards there is + +* Check according to PCI arbiter control register if run with monarch +* +* INPUT: +* +* OUTPUT: +* +* RETURN: +* MV_TRUE if the PRPMC is monarch, MV_FALSE otherwise. +* +*******************************************************************************/ +MV_BOOL mvBoardPciIsMonarch(void) +{ +#if defined(DB_MNG) + /* the u-boot set the arbitter for DB_88F5181_DDR1_MNG boards */ + if((MV_REG_READ(PCI_ARBITER_CTRL_REG(0)) & PACR_ARB_ENABLE) == 0) + return MV_TRUE; +#endif + + return MV_FALSE; +} +/******************************************************************************* +* mvBoardSlicGpioPinGet - +* +* DESCRIPTION: +* +* INPUT: +* +* OUTPUT: +* None. +* +* RETURN: +* +* +*******************************************************************************/ +MV_U32 mvBoardSlicGpioPinGet(MV_U32 slicNum) +{ + MV_U32 boardId; + boardId = mvBoardIdGet(); + + switch (boardId) + { + case DB_88F5181L_DDR2_2XTDM: + if (0 == slicNum) + { + return 8; + } + else if (1 == slicNum) + { + return 9; + } + else return -1; + break; + case RD_88F5181L_VOIP_FE: + if (0 == slicNum) + { + return 2; + } + else if (1 == slicNum) + { + return 5; + } + else return -1; + break; + default: + return -1; + break; + + } +} + diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/boardEnv/mvBoardEnvLib.h linux-88fxx81/arch/arm/mach-mv88fxx81/Board/boardEnv/mvBoardEnvLib.h --- linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/boardEnv/mvBoardEnvLib.h 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/mach-mv88fxx81/Board/boardEnv/mvBoardEnvLib.h 2007-01-05 04:19:34.000000000 +1030 @@ -0,0 +1,228 @@ +/******************************************************************************* +Copyright (C) Marvell International Ltd. and its affiliates + +This software file (the "File") is owned and distributed by Marvell +International Ltd. and/or its affiliates ("Marvell") under the following +alternative licensing terms. Once you have made an election to distribute the +File under one of the following license alternatives, please (i) delete this +introductory statement regarding license alternatives, (ii) delete the two +license alternatives that you have not elected to use and (iii) preserve the +Marvell copyright notice above. + +******************************************************************************** +Marvell Commercial License Option + +If you received this File from Marvell and you have entered into a commercial +license agreement (a "Commercial License") with Marvell, the File is licensed +to you under the terms of the applicable Commercial License. + +******************************************************************************** +Marvell GPL License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File in accordance with the terms and conditions of the General +Public License Version 2, June 1991 (the "GPL License"), a copy of which is +available along with the File in the license.txt file or by writing to the Free +Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or +on the worldwide web at http://www.gnu.org/licenses/gpl.txt. + +THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED +WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY +DISCLAIMED. The GPL License provides additional details about this warranty +disclaimer. +******************************************************************************** +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + * Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ +#ifndef __INCmvBoardEnvLibh +#define __INCmvBoardEnvLibh + +/* defines */ +/* The below constant macros defines the board I2C EEPROM data offsets */ + + + +#include "mvCtrlEnvLib.h" +#include "mvSysHwConfig.h" +#include "mvBoardEnvSpec.h" + + +/* DUART stuff for Tclk detection only */ +#define DUART_BAUD_RATE 115200 +#define MAX_CLOCK_MARGINE 5000000 /* Maximum detected clock margine */ + +#define MV_BOARD_MAX_PCI_SLOTS 3 +#define MV_BOARD_MAX_PCI_IF 1 +#define MV_BOARD_MAX_USB_IF 2 +#define MV_BOARD_MAX_DEV 4 +#define MV_BOARD_MAX_TWSI_DEV 8 +#define MV_BOARD_MAX_MPP 4 +#define MV_BOARD_NAME_LEN 0x20 + +typedef struct _boardData +{ + MV_U32 magic; + MV_U16 boardId; + MV_U8 boardVer; + MV_U8 boardRev; + MV_U32 reserved1; + MV_U32 reserved2; + +}BOARD_DATA; + + + +typedef enum _devBoardType +{ + BOARD_DEV_NOR_FLASH, + BOARD_DEV_NAND_FLASH, + BOARD_DEV_SEVEN_SEG, + BOARD_DEV_FPGA, + BOARD_DEV_SRAM, + BOARD_DEV_RTC, + BOARD_DEV_PEX_TO_PCI_BRIDGE, + BOARD_DEV_MV_6063_SWITCH, + BOARD_DEV_USB_VBUS, + BOARD_DEV_REF_CLCK, + BOARD_DEV_DISPLAY_LCD, + BOARD_DEV_DISPLAY_LED, + +}MV_BOARD_DEV_TYPE; + + +typedef struct _pciBoardSlot +{ + MV_U8 pciSlotGppIntMap[4]; + +}MV_BOARD_PCI_SLOT; + + +typedef struct _pciBoardIf +{ + MV_U8 firstSlotDevNum; + MV_U8 pciSlotsNum; + MV_BOARD_PCI_SLOT pciSlot[MV_BOARD_MAX_PCI_SLOTS]; + +}MV_BOARD_PCI_IF; + + +typedef struct _devCsInfo +{ + MV_U32 params; + MV_U32 devType; /* MV_BOARD_DEV_TYPE */ + MV_U8 devWidth; + +}MV_DEV_CS_INFO; + +/* +1) +struct _devTwsiDevInfo is defined for future use to support the following APIs: + +MV_U8 mvBoardGetDeviceTwsiAddr(MV_32 devNum, MV_BOARD_DEV_TYPE devType); +MV_U8 mvBoardGetDeviceTwsiAddrType(MV_32 devNum, MV_BOARD_DEV_TYPE devType); + +So the user can search for board device either on Device CSs or Twsi Bus. + +And to do this array: MV_DEV_TWSI_INFO twsiDevInfo[MV_BOARD_MAX_TWSI_DEV] +should be added to the MV_BOARD_INFO structure. + +typedef struct _devTwsiInfo +{ + MV_U32 devType; + MV_U8 twsiDevAddr; + MV_U8 twsiDevAddrType; + +}MV_DEV_TWSI_INFO; + + +*/ + + + + +typedef struct _boardInfo +{ + char boardName[MV_BOARD_NAME_LEN]; + MV_U32 mppGroup[MV_BOARD_MAX_MPP]; + MV_U32 intsGppMask; + MV_DEV_CS_INFO devCsInfo[MV_BOARD_MAX_DEV]; + MV_BOARD_PCI_IF pciBoardIf[MV_BOARD_MAX_PCI_IF]; + MV_U8 rtcTwsiAddr; + MV_U8 rtcTwsiAddrType; + MV_U8 pexPciBridgeTwsiAddr; + MV_U8 pexPciBridgeTwsiAddrType; + MV_U8 ethPhyAddr[BOARD_ETH_PORT_NUM]; + MV_U8 rtcIntPin; + MV_U8 switchIntPin; + MV_U8 vbusUsbGppPin[MV_BOARD_MAX_USB_IF]; + MV_U8 activeLedsNumber; + MV_U8 ledGppPin[8]; + MV_U8 ledsPolarity; /* '0' or '1' to turn on led */ + MV_U8 refClkGppPin; + +}MV_BOARD_INFO; + + +MV_VOID mvBoardEnvInit(MV_VOID); +MV_U32 mvBoardIdGet(MV_VOID); +MV_U16 mvBoardModelGet(MV_VOID); +MV_U16 mvBoardRevGet(MV_VOID); +MV_STATUS mvBoardNameGet(char *pNameBuff); +MV_U32 mvBoardPhyAddrGet(MV_U32 ethPortNum); +MV_BOOL mvBoardIsPortInSgmii(MV_U32 ethPortNum); +MV_U32 mvBoardTclkGet(MV_VOID); +MV_U32 mvBoardSysClkGet(MV_VOID); + +MV_VOID mvBoardDebug7Seg(MV_U32 hexNum); +MV_U32 mvBoardMppGet(MV_U32 mppGroupNum); + +MV_U8 mvBoardRtcTwsiAddrTypeGet(MV_VOID); +MV_U8 mvBoardRtcTwsiAddrGet(MV_VOID); + +/* Board devices API managments */ +MV_32 mvBoardGetDevicesNumber(MV_BOARD_DEV_TYPE devType); +MV_32 mvBoardGetDeviceBaseAddr(MV_32 devNum, MV_BOARD_DEV_TYPE devType); +MV_32 mvBoardGetDeviceBusWidth(MV_32 devNum, MV_BOARD_DEV_TYPE devType); +MV_32 mvBoardGetDeviceWidth(MV_32 devNum, MV_BOARD_DEV_TYPE devType); + +/* Gpio Pic Connections API */ +MV_U32 mvBoardUSBVbusGpioPinGet(int devId); +MV_U32 mvBoardPexBridgeIntPinGet(MV_U32 devNum, MV_U32 intPin); +MV_U32 mvBoardPciGpioPinGet(MV_U32 pciIf, MV_U32 idSel, MV_U32 intPin); +MV_U32 mvBoardRTCGpioPinGet(MV_VOID); +MV_U32 mvBoardGpioIntMaskGet(MV_VOID); +MV_U32 mvBoardSlicGpioPinGet(MV_U32 slicNum); + +/* Misc */ +MV_U32 mvBoardFirstPciSlotDevNumGet(MV_U32 pciIf); +MV_U32 mvBoardPciSlotsNumGet(MV_U32 pciIf); +MV_BOOL mvBoardPciIsMonarch(void); + +#endif /* __INCmvBoardEnvLibh */ diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/dram/mvDram.c linux-88fxx81/arch/arm/mach-mv88fxx81/Board/dram/mvDram.c --- linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/dram/mvDram.c 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/mach-mv88fxx81/Board/dram/mvDram.c 2006-08-30 19:27:36.000000000 +0930 @@ -0,0 +1,1394 @@ +/******************************************************************************* +Copyright (C) Marvell International Ltd. and its affiliates + +This software file (the "File") is owned and distributed by Marvell +International Ltd. and/or its affiliates ("Marvell") under the following +alternative licensing terms. Once you have made an election to distribute the +File under one of the following license alternatives, please (i) delete this +introductory statement regarding license alternatives, (ii) delete the two +license alternatives that you have not elected to use and (iii) preserve the +Marvell copyright notice above. + +******************************************************************************** +Marvell Commercial License Option + +If you received this File from Marvell and you have entered into a commercial +license agreement (a "Commercial License") with Marvell, the File is licensed +to you under the terms of the applicable Commercial License. + +******************************************************************************** +Marvell GPL License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File in accordance with the terms and conditions of the General +Public License Version 2, June 1991 (the "GPL License"), a copy of which is +available along with the File in the license.txt file or by writing to the Free +Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or +on the worldwide web at http://www.gnu.org/licenses/gpl.txt. + +THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED +WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY +DISCLAIMED. The GPL License provides additional details about this warranty +disclaimer. +******************************************************************************** +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + * Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#include "mvDram.h" +#include "mvBoardEnvLib.h" + +#undef MV_DEBUG +#ifdef MV_DEBUG +#define DB(x) x +#else +#define DB(x) +#endif + +static MV_VOID cpyDimm2BankInfo(MV_DIMM_INFO *pDimmInfo, + MV_DRAM_BANK_INFO *pBankInfo); +static MV_U32 cas2ps(MV_U8 spd_byte); +/******************************************************************************* +* mvDramBankGet - Get the DRAM bank paramters. +* +* DESCRIPTION: +* This function retrieves DRAM bank parameters as described in +* DRAM_BANK_INFO struct to the controller DRAM unit. In case the board +* has its DRAM on DIMMs it will use its EEPROM to extract SPD data +* from it. Otherwise, if the DRAM is soldered on board, the function +* should insert its bank information into MV_DRAM_BANK_INFO struct. +* +* INPUT: +* bankNum - Board DRAM bank number. +* +* OUTPUT: +* pBankInfo - DRAM bank information struct. +* +* RETURN: +* MV_FAIL - Bank parameters could not be read. +* +*******************************************************************************/ +MV_STATUS mvDramBankInfoGet(MV_U32 bankNum, MV_DRAM_BANK_INFO *pBankInfo) +{ + MV_DIMM_INFO dimmInfo; + + DB(mvOsPrintf("Dram: mvDramBankInfoGet bank %d\n", bankNum)); + /* zero pBankInfo structure */ + memset(pBankInfo, 0, sizeof(*pBankInfo)); + + if((NULL == pBankInfo) || (bankNum >= MV_DRAM_MAX_CS )) + { + DB(mvOsPrintf("Dram: mvDramBankInfoGet bad params \n")); + return MV_BAD_PARAM; + } + if( MV_OK != dimmSpdGet((MV_U32)(bankNum/2), &dimmInfo)) + { + DB(mvOsPrintf("Dram: ERR dimmSpdGet failed to get dimm info \n")); + return MV_FAIL; + } + if((dimmInfo.numOfModuleBanks == 1) && ((bankNum % 2) == 1)) + { + DB(mvOsPrintf("Dram: ERR dimmSpdGet. Can't find DIMM bank 2 \n")); + return MV_FAIL; + } + + /* convert Dimm info to Bank info */ + cpyDimm2BankInfo(&dimmInfo, pBankInfo); + + return MV_OK; +} + +/******************************************************************************* +* cpyDimm2BankInfo - Convert a Dimm info struct into a bank info struct. +* +* DESCRIPTION: +* Convert a Dimm info struct into a bank info struct. +* +* INPUT: +* pDimmInfo - DIMM information structure. +* +* OUTPUT: +* pBankInfo - DRAM bank information struct. +* +* RETURN: +* None. +* +*******************************************************************************/ +static MV_VOID cpyDimm2BankInfo(MV_DIMM_INFO *pDimmInfo, + MV_DRAM_BANK_INFO *pBankInfo) +{ + pBankInfo->memoryType = pDimmInfo->memoryType; + + /* DIMM dimensions */ + pBankInfo->numOfRowAddr = pDimmInfo->numOfRowAddr; + pBankInfo->numOfColAddr = pDimmInfo->numOfColAddr; + pBankInfo->dataWidth = pDimmInfo->dataWidth; + pBankInfo->errorCheckType = pDimmInfo->errorCheckType; + pBankInfo->sdramWidth = pDimmInfo->sdramWidth; + pBankInfo->errorCheckDataWidth = pDimmInfo->errorCheckDataWidth; + pBankInfo->numOfBanksOnEachDevice = pDimmInfo->numOfBanksOnEachDevice; + pBankInfo->suportedCasLatencies = pDimmInfo->suportedCasLatencies; + pBankInfo->refreshInterval = pDimmInfo->refreshInterval; + + /* DIMM timing parameters */ + pBankInfo->minCycleTimeAtMaxCasLatPs = pDimmInfo->minCycleTimeAtMaxCasLatPs; + pBankInfo->minCycleTimeAtMaxCasLatMinus1Ps = + pDimmInfo->minCycleTimeAtMaxCasLatMinus1Ps; + pBankInfo->minCycleTimeAtMaxCasLatMinus2Ps = + pDimmInfo->minCycleTimeAtMaxCasLatMinus2Ps; + + pBankInfo->minRowPrechargeTime = pDimmInfo->minRowPrechargeTime; + pBankInfo->minRowActiveToRowActive = pDimmInfo->minRowActiveToRowActive; + pBankInfo->minRasToCasDelay = pDimmInfo->minRasToCasDelay; + pBankInfo->minRasPulseWidth = pDimmInfo->minRasPulseWidth; + pBankInfo->minWriteRecoveryTime = pDimmInfo->minWriteRecoveryTime; + pBankInfo->minWriteToReadCmdDelay = pDimmInfo->minWriteToReadCmdDelay; + pBankInfo->minReadToPrechCmdDelay = pDimmInfo->minReadToPrechCmdDelay; + pBankInfo->minRefreshToActiveCmd = pDimmInfo->minRefreshToActiveCmd; + + /* Parameters calculated from the extracted DIMM information */ + pBankInfo->size = pDimmInfo->size/pDimmInfo->numOfModuleBanks; + pBankInfo->deviceDensity = pDimmInfo->deviceDensity; + pBankInfo->numberOfDevices = pDimmInfo->numberOfDevices / + pDimmInfo->numOfModuleBanks; + + /* DIMM attributes (MV_TRUE for yes) */ + + if ((pDimmInfo->memoryType == MEM_TYPE_SDRAM) || + (pDimmInfo->memoryType == MEM_TYPE_DDR1) ) + { + if (pDimmInfo->dimmAttributes & BIT1) + pBankInfo->registeredAddrAndControlInputs = MV_TRUE; + else + pBankInfo->registeredAddrAndControlInputs = MV_FALSE; + } + else /* pDimmInfo->memoryType == MEM_TYPE_DDR2 */ + { + if (pDimmInfo->dimmTypeInfo & (BIT0 | BIT4)) + pBankInfo->registeredAddrAndControlInputs = MV_TRUE; + else + pBankInfo->registeredAddrAndControlInputs = MV_FALSE; + } + + return; +} + +/******************************************************************************* +* dimmSpdGet - Get the SPD parameters. +* +* DESCRIPTION: +* Read the DIMM SPD parameters into given struct parameter. +* +* INPUT: +* dimmNum - DIMM number. See MV_BOARD_DIMM_NUM enumerator. +* +* OUTPUT: +* pDimmInfo - DIMM information structure. +* +* RETURN: +* MV_TRUE if function could read DIMM parameters, MV_FALSE otherwise. +* +*******************************************************************************/ +MV_STATUS dimmSpdGet(MV_U32 dimmNum, MV_DIMM_INFO *pDimmInfo) +{ + MV_U32 i; + MV_U32 density = 1; + MV_U32 spdChecksum; + + MV_TWSI_SLAVE twsiSlave; + MV_U8 data[SPD_SIZE]; + + if((NULL == pDimmInfo)|| (dimmNum >= MAX_DIMM_NUM)) + { + DB(mvOsPrintf("Dram: mvDramBankInfoGet bad params \n")); + return MV_BAD_PARAM; + } + + /* zero dimmInfo structure */ + memset(data, 0, SPD_SIZE); + + /* read the dimm eeprom */ + DB(mvOsPrintf("DRAM: Read Dimm eeprom\n")); + twsiSlave.slaveAddr.address = (dimmNum == 0) ? + MV_BOARD_DIMM0_I2C_ADDR : MV_BOARD_DIMM1_I2C_ADDR; + twsiSlave.slaveAddr.type = ADDR7_BIT; + twsiSlave.validOffset = MV_TRUE; + twsiSlave.offset = 0; + twsiSlave.moreThen256 = MV_FALSE; + + if( MV_OK != mvTwsiRead (&twsiSlave, data, SPD_SIZE) ) + { + DB(mvOsPrintf("DRAM: ERR. no DIMM in dimmNum %d \n", dimmNum)); + return MV_FAIL; + } + DB(puts("DRAM: Reading dimm info succeded.\n")); + + /* calculate SPD checksum */ + spdChecksum = 0; + + for(i = 0 ; i <= 62 ; i++) + { + spdChecksum += data[i]; + } + + if ((spdChecksum & 0xff) != data[63]) + { + DB(mvOsPrintf("DRAM: Warning. Wrong SPD Checksum %2x, expValue=%2x\n", + (MV_U32)(spdChecksum & 0xff), data[63])); + } + else + { + DB(mvOsPrintf("DRAM: SPD Checksum ok!\n")); + } + + /* copy the SPD content 1:1 into the dimmInfo structure*/ + for(i = 0 ; i < SPD_SIZE ; i++) + { + pDimmInfo->spdRawData[i] = data[i]; + DB(mvOsPrintf("SPD-EEPROM Byte %3d = %3x (%3d)\n",i, data[i], data[i])); + } + + DB(mvOsPrintf("DRAM SPD Information:\n")); + + /* Memory type (DDR / SDRAM) */ + switch (data[DIMM_MEM_TYPE]) + { + case (DIMM_MEM_TYPE_SDRAM): + pDimmInfo->memoryType = MEM_TYPE_SDRAM; + DB(mvOsPrintf("DRAM Memeory type SDRAM\n")); + break; + case (DIMM_MEM_TYPE_DDR1): + pDimmInfo->memoryType = MEM_TYPE_DDR1; + DB(mvOsPrintf("DRAM Memeory type DDR1\n")); + break; + case (DIMM_MEM_TYPE_DDR2): + pDimmInfo->memoryType = MEM_TYPE_DDR2; + DB(mvOsPrintf("DRAM Memeory type DDR2\n")); + break; + default: + mvOsPrintf("ERROR: Undefined memory type!\n"); + return MV_ERROR; + } + + + /* Number Of Row Addresses */ + pDimmInfo->numOfRowAddr = data[DIMM_ROW_NUM]; + DB(mvOsPrintf("DRAM numOfRowAddr[3] %d\n",pDimmInfo->numOfRowAddr)); + + /* Number Of Column Addresses */ + pDimmInfo->numOfColAddr = data[DIMM_COL_NUM]; + DB(mvOsPrintf("DRAM numOfColAddr[4] %d\n",pDimmInfo->numOfColAddr)); + + /* Number Of Module Banks */ + pDimmInfo->numOfModuleBanks = data[DIMM_MODULE_BANK_NUM]; + DB(mvOsPrintf("DRAM numOfModuleBanks[5] 0x%x\n", + pDimmInfo->numOfModuleBanks)); + + /* Number of module banks encoded differently for DDR2 */ + if (pDimmInfo->memoryType == MEM_TYPE_DDR2) + pDimmInfo->numOfModuleBanks = (pDimmInfo->numOfModuleBanks & 0x7)+1; + + /* Data Width */ + pDimmInfo->dataWidth = data[DIMM_DATA_WIDTH]; + DB(mvOsPrintf("DRAM dataWidth[6] 0x%x\n", pDimmInfo->dataWidth)); + + /* Minimum Cycle Time At Max CasLatancy */ + pDimmInfo->minCycleTimeAtMaxCasLatPs = cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS]); + + /* Error Check Type */ + pDimmInfo->errorCheckType = data[DIMM_ERR_CHECK_TYPE]; + DB(mvOsPrintf("DRAM errorCheckType[11] 0x%x\n", + pDimmInfo->errorCheckType)); + + /* Refresh Interval */ + pDimmInfo->refreshInterval = data[DIMM_REFRESH_INTERVAL]; + DB(mvOsPrintf("DRAM refreshInterval[12] 0x%x\n", + pDimmInfo->refreshInterval)); + + /* Sdram Width */ + pDimmInfo->sdramWidth = data[DIMM_SDRAM_WIDTH]; + DB(mvOsPrintf("DRAM sdramWidth[13] 0x%x\n",pDimmInfo->sdramWidth)); + + /* Error Check Data Width */ + pDimmInfo->errorCheckDataWidth = data[DIMM_ERR_CHECK_DATA_WIDTH]; + DB(mvOsPrintf("DRAM errorCheckDataWidth[14] 0x%x\n", + pDimmInfo->errorCheckDataWidth)); + + /* Burst Length Supported */ + /* SDRAM/DDR1: + *******-******-******-******-******-******-******-******* + * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * + *******-******-******-******-******-******-******-******* + burst length = * Page | TBD | TBD | TBD | 8 | 4 | 2 | 1 * + *********************************************************/ + /* DDR2: + *******-******-******-******-******-******-******-******* + * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * + *******-******-******-******-******-******-******-******* + burst length = * Page | TBD | TBD | TBD | 8 | 4 | TBD | TBD * + *********************************************************/ + + pDimmInfo->burstLengthSupported = data[DIMM_BURST_LEN_SUP]; + DB(mvOsPrintf("DRAM burstLengthSupported[16] 0x%x\n", + pDimmInfo->burstLengthSupported)); + + /* Number Of Banks On Each Device */ + pDimmInfo->numOfBanksOnEachDevice = data[DIMM_DEV_BANK_NUM]; + DB(mvOsPrintf("DRAM numOfBanksOnEachDevice[17] 0x%x\n", + pDimmInfo->numOfBanksOnEachDevice)); + + /* Suported Cas Latencies */ + + /* SDRAM: + *******-******-******-******-******-******-******-******* + * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * + *******-******-******-******-******-******-******-******* + CAS = * TBD | 7 | 6 | 5 | 4 | 3 | 2 | 1 * + ********************************************************/ + + /* DDR 1: + *******-******-******-******-******-******-******-******* + * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * + *******-******-******-******-******-******-******-******* + CAS = * TBD | 4 | 3.5 | 3 | 2.5 | 2 | 1.5 | 1 * + *********************************************************/ + + /* DDR 2: + *******-******-******-******-******-******-******-******* + * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * + *******-******-******-******-******-******-******-******* + CAS = * TBD | TBD | 5 | 4 | 3 | 2 | TBD | TBD * + *********************************************************/ + + pDimmInfo->suportedCasLatencies = data[DIMM_SUP_CAL]; + DB(mvOsPrintf("DRAM suportedCasLatencies[18] 0x%x\n", + pDimmInfo->suportedCasLatencies)); + + /* For DDR2 only, get the DIMM type information */ + if (pDimmInfo->memoryType == MEM_TYPE_DDR2) + { + pDimmInfo->dimmTypeInfo = data[DIMM_DDR2_TYPE_INFORMATION]; + DB(mvOsPrintf("DRAM dimmTypeInfo[20] (DDR2) 0x%x\n", + pDimmInfo->dimmTypeInfo)); + } + + /* SDRAM Modules Attributes */ + pDimmInfo->dimmAttributes = data[DIMM_BUF_ADDR_CONT_IN]; + DB(mvOsPrintf("DRAM dimmAttributes[21] 0x%x\n", + pDimmInfo->dimmAttributes)); + + /* Minimum Cycle Time At Max CasLatancy Minus 1*/ + pDimmInfo->minCycleTimeAtMaxCasLatMinus1Ps = + cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS_MINUS1]); + + /* Minimum Cycle Time At Max CasLatancy Minus 2*/ + pDimmInfo->minCycleTimeAtMaxCasLatMinus2Ps = + cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS_MINUS2]); + + pDimmInfo->minRowPrechargeTime = data[DIMM_MIN_ROW_PRECHARGE_TIME]; + DB(mvOsPrintf("DRAM minRowPrechargeTime[27] 0x%x\n", + pDimmInfo->minRowPrechargeTime)); + pDimmInfo->minRowActiveToRowActive = data[DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE]; + DB(mvOsPrintf("DRAM minRowActiveToRowActive[28] 0x%x\n", + pDimmInfo->minRowActiveToRowActive)); + pDimmInfo->minRasToCasDelay = data[DIMM_MIN_RAS_TO_CAS_DELAY]; + DB(mvOsPrintf("DRAM minRasToCasDelay[29] 0x%x\n", + pDimmInfo->minRasToCasDelay)); + pDimmInfo->minRasPulseWidth = data[DIMM_MIN_RAS_PULSE_WIDTH]; + DB(mvOsPrintf("DRAM minRasPulseWidth[30] 0x%x\n", + pDimmInfo->minRasPulseWidth)); + + /* DIMM Bank Density */ + pDimmInfo->dimmBankDensity = data[DIMM_BANK_DENSITY]; + DB(mvOsPrintf("DRAM dimmBankDensity[31] 0x%x\n", + pDimmInfo->dimmBankDensity)); + + /* Only DDR2 includes Write Recovery Time field. Other SDRAM ignore */ + pDimmInfo->minWriteRecoveryTime = data[DIMM_MIN_WRITE_RECOVERY_TIME]; + DB(mvOsPrintf("DRAM minWriteRecoveryTime[36] 0x%x\n", + pDimmInfo->minWriteRecoveryTime)); + + /* Only DDR2 includes Internal Write To Read Command Delay field. */ + pDimmInfo->minWriteToReadCmdDelay = data[DIMM_MIN_WRITE_TO_READ_CMD_DELAY]; + DB(mvOsPrintf("DRAM minWriteToReadCmdDelay[37] 0x%x\n", + pDimmInfo->minWriteToReadCmdDelay)); + + /* Only DDR2 includes Internal Read To Precharge Command Delay field. */ + pDimmInfo->minReadToPrechCmdDelay = data[DIMM_MIN_READ_TO_PRECH_CMD_DELAY]; + DB(mvOsPrintf("DRAM minReadToPrechCmdDelay[38] 0x%x\n", + pDimmInfo->minReadToPrechCmdDelay)); + + /* Only DDR2 includes Minimum Refresh to Activate/Refresh Command field */ + pDimmInfo->minRefreshToActiveCmd = data[DIMM_MIN_REFRESH_TO_ACTIVATE_CMD]; + DB(mvOsPrintf("DRAM minRefreshToActiveCmd[42] 0x%x\n", + pDimmInfo->minRefreshToActiveCmd)); + + /* calculating the sdram density. Representing device density from */ + /* bit 20 to allow representation of 4GB and above. */ + /* For example, if density is 512Mbit 0x20000000, will be represent in */ + /* deviceDensity by 0x20000000 >> 16 --> 0x00000200. Another example */ + /* is density 8GB 0x200000000 >> 16 --> 0x00002000. */ + density = (1 << ((pDimmInfo->numOfRowAddr + pDimmInfo->numOfColAddr) - 20)); + pDimmInfo->deviceDensity = density * + pDimmInfo->numOfBanksOnEachDevice * + pDimmInfo->sdramWidth; + DB(mvOsPrintf("DRAM deviceDensity %d\n",pDimmInfo->deviceDensity)); + + /* Number of devices includeing Error correction */ + pDimmInfo->numberOfDevices = (pDimmInfo->dataWidth/pDimmInfo->sdramWidth) * + pDimmInfo->numOfModuleBanks; + DB(mvOsPrintf("DRAM numberOfDevices %d\n", + pDimmInfo->numberOfDevices)); + + pDimmInfo->size = 0; + + /* Note that pDimmInfo->size is in MB units */ + if (pDimmInfo->memoryType == MEM_TYPE_SDRAM) + { + if (pDimmInfo->dimmBankDensity & BIT0) + pDimmInfo->size += 1024; /* Equal to 1GB */ + else if (pDimmInfo->dimmBankDensity & BIT1) + pDimmInfo->size += 8; /* Equal to 8MB */ + else if (pDimmInfo->dimmBankDensity & BIT2) + pDimmInfo->size += 16; /* Equal to 16MB */ + else if (pDimmInfo->dimmBankDensity & BIT3) + pDimmInfo->size += 32; /* Equal to 32MB */ + else if (pDimmInfo->dimmBankDensity & BIT4) + pDimmInfo->size += 64; /* Equal to 64MB */ + else if (pDimmInfo->dimmBankDensity & BIT5) + pDimmInfo->size += 128; /* Equal to 128MB */ + else if (pDimmInfo->dimmBankDensity & BIT6) + pDimmInfo->size += 256; /* Equal to 256MB */ + else if (pDimmInfo->dimmBankDensity & BIT7) + pDimmInfo->size += 512; /* Equal to 512MB */ + } + else if (pDimmInfo->memoryType == MEM_TYPE_DDR1) + { + if (pDimmInfo->dimmBankDensity & BIT0) + pDimmInfo->size += 1024; /* Equal to 1GB */ + else if (pDimmInfo->dimmBankDensity & BIT1) + pDimmInfo->size += 2048; /* Equal to 2GB */ + else if (pDimmInfo->dimmBankDensity & BIT2) + pDimmInfo->size += 16; /* Equal to 16MB */ + else if (pDimmInfo->dimmBankDensity & BIT3) + pDimmInfo->size += 32; /* Equal to 32MB */ + else if (pDimmInfo->dimmBankDensity & BIT4) + pDimmInfo->size += 64; /* Equal to 64MB */ + else if (pDimmInfo->dimmBankDensity & BIT5) + pDimmInfo->size += 128; /* Equal to 128MB */ + else if (pDimmInfo->dimmBankDensity & BIT6) + pDimmInfo->size += 256; /* Equal to 256MB */ + else if (pDimmInfo->dimmBankDensity & BIT7) + pDimmInfo->size += 512; /* Equal to 512MB */ + } + else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */ + { + if (pDimmInfo->dimmBankDensity & BIT0) + pDimmInfo->size += 1024; /* Equal to 1GB */ + else if (pDimmInfo->dimmBankDensity & BIT1) + pDimmInfo->size += 2048; /* Equal to 2GB */ + else if (pDimmInfo->dimmBankDensity & BIT2) + pDimmInfo->size += 4096; /* Equal to 4GB */ + else if (pDimmInfo->dimmBankDensity & BIT3) + pDimmInfo->size += 8192; /* Equal to 8GB */ + else if (pDimmInfo->dimmBankDensity & BIT4) + pDimmInfo->size += 16384; /* Equal to 16GB */ + else if (pDimmInfo->dimmBankDensity & BIT5) + pDimmInfo->size += 128; /* Equal to 128MB */ + else if (pDimmInfo->dimmBankDensity & BIT6) + pDimmInfo->size += 256; /* Equal to 256MB */ + else if (pDimmInfo->dimmBankDensity & BIT7) + pDimmInfo->size += 512; /* Equal to 512MB */ + } + + pDimmInfo->size *= pDimmInfo->numOfModuleBanks; + + DB(mvOsPrintf("Dram: dimm size %dMB \n",pDimmInfo->size)); + + return MV_OK; +} + +/******************************************************************************* +* dimmSpdPrint - Print the SPD parameters. +* +* DESCRIPTION: +* Print the Dimm SPD parameters. +* +* INPUT: +* pDimmInfo - DIMM information structure. +* +* OUTPUT: +* None. +* +* RETURN: +* None. +* +*******************************************************************************/ +MV_VOID dimmSpdPrint(MV_U32 dimmNum) +{ + MV_DIMM_INFO dimmInfo; + MV_U32 i, temp = 0; + MV_U32 k, maskLeftOfPoint = 0, maskRightOfPoint = 0; + MV_U32 rightOfPoint = 0,leftOfPoint = 0, div, time_tmp, shift; + MV_U32 busClkPs; + MV_U8 trp_clocks=0, trcd_clocks, tras_clocks, trrd_clocks, + temp_buf[40], *spdRawData; + + busClkPs = 1000000000 / (mvBoardSysClkGet() / 100); /* in 10 ps units */ + + spdRawData = dimmInfo.spdRawData; + + if(MV_OK != dimmSpdGet(dimmNum, &dimmInfo)) + { + mvOsOutput("ERROR: Could not read SPD information!\n"); + return; + } + + /* find Manufactura of Dimm Module */ + mvOsOutput("\nManufacturer's JEDEC ID Code: "); + for(i = 0 ; i < DIMM_MODULE_MANU_SIZE ; i++) + { + mvOsOutput("%x",spdRawData[DIMM_MODULE_MANU_OFFS + i]); + } + mvOsOutput("\n"); + + /* Manufacturer's Specific Data */ + for(i = 0 ; i < DIMM_MODULE_ID_SIZE ; i++) + { + temp_buf[i] = spdRawData[DIMM_MODULE_ID_OFFS + i]; + } + mvOsOutput("Manufacturer's Specific Data: %s\n", temp_buf); + + /* Module Part Number */ + for(i = 0 ; i < DIMM_MODULE_VEN_SIZE ; i++) + { + temp_buf[i] = spdRawData[DIMM_MODULE_VEN_OFFS + i]; + } + mvOsOutput("Module Part Number: %s\n", temp_buf); + + /* Module Serial Number */ + for(i = 0; i < sizeof(MV_U32); i++) + { + temp |= spdRawData[95+i] << 8*i; + } + mvOsOutput("DIMM Serial No. %ld (%lx)\n", (long)temp, + (long)temp); + + /* find Manufac-Data of Dimm Module */ + mvOsOutput("Manufactoring Date: Year 20%d%d/ ww %d%d\n", + ((spdRawData[93] & 0xf0) >> 4), (spdRawData[93] & 0xf), + ((spdRawData[94] & 0xf0) >> 4), (spdRawData[94] & 0xf)); + /* find modul_revision of Dimm Module */ + mvOsOutput("Module Revision: %d.%d\n", + spdRawData[91], spdRawData[92]); + + /* find manufac_place of Dimm Module */ + mvOsOutput("manufac_place: %d\n", spdRawData[72]); + + /* go over the first 35 I2C data bytes */ + for(i = 2 ; i <= 35 ; i++) + switch(i) + { + case 2: /* Memory type (DDR1/2 / SDRAM) */ + if (dimmInfo.memoryType == MEM_TYPE_SDRAM) + mvOsOutput("Dram Type is: SDRAM\n"); + else if (dimmInfo.memoryType == MEM_TYPE_DDR1) + mvOsOutput("Dram Type is: SDRAM DDR1\n"); + else if (dimmInfo.memoryType == MEM_TYPE_DDR2) + mvOsOutput("Dram Type is: SDRAM DDR2\n"); + else + mvOsOutput("Dram Type unknown\n"); + break; +/*----------------------------------------------------------------------------*/ + + case 3: /* Number Of Row Addresses */ + mvOsOutput("Module Number of row addresses: %d\n", + dimmInfo.numOfRowAddr); + break; +/*----------------------------------------------------------------------------*/ + + case 4: /* Number Of Column Addresses */ + mvOsOutput("Module Number of col addresses: %d\n", + dimmInfo.numOfColAddr); + break; +/*----------------------------------------------------------------------------*/ + + case 5: /* Number Of Module Banks */ + mvOsOutput("Number of Banks on Mod.: %d\n", + dimmInfo.numOfModuleBanks); + break; +/*----------------------------------------------------------------------------*/ + + case 6: /* Data Width */ + mvOsOutput("Module Data Width: %d bit\n", + dimmInfo.dataWidth); + break; +/*----------------------------------------------------------------------------*/ + + case 8: /* Voltage Interface */ + switch(spdRawData[i]) + { + case 0x0: + mvOsOutput("Module is TTL_5V_TOLERANT\n"); + break; + case 0x1: + mvOsOutput("Module is LVTTL\n"); + break; + case 0x2: + mvOsOutput("Module is HSTL_1_5V\n"); + break; + case 0x3: + mvOsOutput("Module is SSTL_3_3V\n"); + break; + case 0x4: + mvOsOutput("Module is SSTL_2_5V\n"); + break; + case 0x5: + if (dimmInfo.memoryType != MEM_TYPE_SDRAM) + { + mvOsOutput("Module is SSTL_1_8V\n"); + break; + } + default: + mvOsOutput("Module is VOLTAGE_UNKNOWN\n"); + break; + } + break; +/*----------------------------------------------------------------------------*/ + + case 9: /* Minimum Cycle Time At Max CasLatancy */ + leftOfPoint = (spdRawData[i] & 0xf0) >> 4; + rightOfPoint = (spdRawData[i] & 0x0f) * 10; + + /* DDR2 addition of right of point */ + if ((spdRawData[i] & 0x0f) == 0xA) + { + rightOfPoint = 25; + } + if ((spdRawData[i] & 0x0f) == 0xB) + { + rightOfPoint = 33; + } + if ((spdRawData[i] & 0x0f) == 0xC) + { + rightOfPoint = 66; + } + if ((spdRawData[i] & 0x0f) == 0xD) + { + rightOfPoint = 75; + } + mvOsOutput("Minimum Cycle Time At Max CL: %d.%d [ns]\n", + leftOfPoint, rightOfPoint); + break; +/*----------------------------------------------------------------------------*/ + + case 10: /* Clock To Data Out */ + div = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 10:100; + time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + + ((spdRawData[i] & 0x0f)); + leftOfPoint = time_tmp / div; + rightOfPoint = time_tmp % div; + mvOsOutput("Clock To Data Out: %d.%d [ns]\n", + leftOfPoint, rightOfPoint); + break; +/*----------------------------------------------------------------------------*/ + + case 11: /* Error Check Type */ + mvOsOutput("Error Check Type (0=NONE): %d\n", + dimmInfo.errorCheckType); + break; +/*----------------------------------------------------------------------------*/ + + case 12: /* Refresh Interval */ + mvOsOutput("Refresh Rate: %x\n", + dimmInfo.refreshInterval); + break; +/*----------------------------------------------------------------------------*/ + + case 13: /* Sdram Width */ + mvOsOutput("Sdram Width: %d bits\n", + dimmInfo.sdramWidth); + break; +/*----------------------------------------------------------------------------*/ + + case 14: /* Error Check Data Width */ + mvOsOutput("Error Check Data Width: %d bits\n", + dimmInfo.errorCheckDataWidth); + break; +/*----------------------------------------------------------------------------*/ + + case 15: /* Minimum Clock Delay is unsupported */ + if ((dimmInfo.memoryType == MEM_TYPE_SDRAM) || + (dimmInfo.memoryType == MEM_TYPE_DDR1)) + { + mvOsOutput("Minimum Clk Delay back to back: %d\n", + spdRawData[i]); + } + break; +/*----------------------------------------------------------------------------*/ + + case 16: /* Burst Length Supported */ + /* SDRAM/DDR1: + *******-******-******-******-******-******-******-******* + * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * + *******-******-******-******-******-******-******-******* + burst length = * Page | TBD | TBD | TBD | 8 | 4 | 2 | 1 * + *********************************************************/ + /* DDR2: + *******-******-******-******-******-******-******-******* + * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * + *******-******-******-******-******-******-******-******* + burst length = * Page | TBD | TBD | TBD | 8 | 4 | TBD | TBD * + *********************************************************/ + mvOsOutput("Burst Length Supported: "); + if ((dimmInfo.memoryType == MEM_TYPE_SDRAM) || + (dimmInfo.memoryType == MEM_TYPE_DDR1)) + { + if (dimmInfo.burstLengthSupported & BIT0) + mvOsOutput("1, "); + if (dimmInfo.burstLengthSupported & BIT1) + mvOsOutput("2, "); + } + if (dimmInfo.burstLengthSupported & BIT2) + mvOsOutput("4, "); + if (dimmInfo.burstLengthSupported & BIT3) + mvOsOutput("8, "); + + mvOsOutput(" Bit \n"); + break; +/*----------------------------------------------------------------------------*/ + + case 17: /* Number Of Banks On Each Device */ + mvOsOutput("Number Of Banks On Each Chip: %d\n", + dimmInfo.numOfBanksOnEachDevice); + break; +/*----------------------------------------------------------------------------*/ + + case 18: /* Suported Cas Latencies */ + + /* SDRAM: + *******-******-******-******-******-******-******-******* + * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * + *******-******-******-******-******-******-******-******* + CAS = * TBD | 7 | 6 | 5 | 4 | 3 | 2 | 1 * + ********************************************************/ + + /* DDR 1: + *******-******-******-******-******-******-******-******* + * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * + *******-******-******-******-******-******-******-******* + CAS = * TBD | 4 | 3.5 | 3 | 2.5 | 2 | 1.5 | 1 * + *********************************************************/ + + /* DDR 2: + *******-******-******-******-******-******-******-******* + * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * + *******-******-******-******-******-******-******-******* + CAS = * TBD | TBD | 5 | 4 | 3 | 2 | TBD | TBD * + *********************************************************/ + + mvOsOutput("Suported Cas Latencies: (CL) "); + if (dimmInfo.memoryType == MEM_TYPE_SDRAM) + { + for (k = 0; k <=7; k++) + { + if (dimmInfo.suportedCasLatencies & (1 << k)) + mvOsOutput("%d, ", k+1); + } + } + else if (dimmInfo.memoryType == MEM_TYPE_DDR1) + { + if (dimmInfo.suportedCasLatencies & BIT0) + mvOsOutput("1, "); + if (dimmInfo.suportedCasLatencies & BIT1) + mvOsOutput("1.5, "); + if (dimmInfo.suportedCasLatencies & BIT2) + mvOsOutput("2, "); + if (dimmInfo.suportedCasLatencies & BIT3) + mvOsOutput("2.5, "); + if (dimmInfo.suportedCasLatencies & BIT4) + mvOsOutput("3, "); + if (dimmInfo.suportedCasLatencies & BIT5) + mvOsOutput("3.5, "); + } + else if (dimmInfo.memoryType == MEM_TYPE_DDR2) + { + if (dimmInfo.suportedCasLatencies & BIT2) + mvOsOutput("2, "); + if (dimmInfo.suportedCasLatencies & BIT3) + mvOsOutput("3, "); + if (dimmInfo.suportedCasLatencies & BIT4) + mvOsOutput("4, "); + if (dimmInfo.suportedCasLatencies & BIT5) + mvOsOutput("5, "); + } + else + mvOsOutput("?.?, "); + mvOsOutput("\n"); + break; +/*----------------------------------------------------------------------------*/ + + case 20: /* DDR2 DIMM type info */ + if (dimmInfo.memoryType == MEM_TYPE_DDR2) + { + if (dimmInfo.dimmTypeInfo & (BIT0 | BIT4)) + mvOsOutput("Registered DIMM (RDIMM)\n"); + else if (dimmInfo.dimmTypeInfo & (BIT1 | BIT5)) + mvOsOutput("Unbuffered DIMM (UDIMM)\n"); + else + mvOsOutput("Unknown DIMM type.\n"); + } + + break; +/*----------------------------------------------------------------------------*/ + + case 21: /* SDRAM Modules Attributes */ + mvOsOutput("\nModule Attributes (SPD Byte 21): \n"); + + if (dimmInfo.memoryType == MEM_TYPE_SDRAM) + { + if (dimmInfo.dimmAttributes & BIT0) + mvOsOutput(" Buffered Addr/Control Input: Yes\n"); + else + mvOsOutput(" Buffered Addr/Control Input: No\n"); + + if (dimmInfo.dimmAttributes & BIT1) + mvOsOutput(" Registered Addr/Control Input: Yes\n"); + else + mvOsOutput(" Registered Addr/Control Input: No\n"); + + if (dimmInfo.dimmAttributes & BIT2) + mvOsOutput(" On-Card PLL (clock): Yes \n"); + else + mvOsOutput(" On-Card PLL (clock): No \n"); + + if (dimmInfo.dimmAttributes & BIT3) + mvOsOutput(" Bufferd DQMB Input: Yes \n"); + else + mvOsOutput(" Bufferd DQMB Inputs: No \n"); + + if (dimmInfo.dimmAttributes & BIT4) + mvOsOutput(" Registered DQMB Inputs: Yes \n"); + else + mvOsOutput(" Registered DQMB Inputs: No \n"); + + if (dimmInfo.dimmAttributes & BIT5) + mvOsOutput(" Differential Clock Input: Yes \n"); + else + mvOsOutput(" Differential Clock Input: No \n"); + + if (dimmInfo.dimmAttributes & BIT6) + mvOsOutput(" redundant Row Addressing: Yes \n"); + else + mvOsOutput(" redundant Row Addressing: No \n"); + } + else if (dimmInfo.memoryType == MEM_TYPE_DDR1) + { + if (dimmInfo.dimmAttributes & BIT0) + mvOsOutput(" Buffered Addr/Control Input: Yes\n"); + else + mvOsOutput(" Buffered Addr/Control Input: No\n"); + + if (dimmInfo.dimmAttributes & BIT1) + mvOsOutput(" Registered Addr/Control Input: Yes\n"); + else + mvOsOutput(" Registered Addr/Control Input: No\n"); + + if (dimmInfo.dimmAttributes & BIT2) + mvOsOutput(" On-Card PLL (clock): Yes \n"); + else + mvOsOutput(" On-Card PLL (clock): No \n"); + + if (dimmInfo.dimmAttributes & BIT3) + mvOsOutput(" FET Switch On-Card Enabled: Yes \n"); + else + mvOsOutput(" FET Switch On-Card Enabled: No \n"); + + if (dimmInfo.dimmAttributes & BIT4) + mvOsOutput(" FET Switch External Enabled: Yes \n"); + else + mvOsOutput(" FET Switch External Enabled: No \n"); + + if (dimmInfo.dimmAttributes & BIT5) + mvOsOutput(" Differential Clock Input: Yes \n"); + else + mvOsOutput(" Differential Clock Input: No \n"); + } + else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */ + { + mvOsOutput(" Number of Active Registers on the DIMM: %d\n", + (dimmInfo.dimmAttributes & 0x3) + 1); + + mvOsOutput(" Number of PLLs on the DIMM: %d\n", + ((dimmInfo.dimmAttributes) >> 2) & 0x3); + + if (dimmInfo.dimmAttributes & BIT4) + mvOsOutput(" FET Switch External Enabled: Yes \n"); + else + mvOsOutput(" FET Switch External Enabled: No \n"); + + if (dimmInfo.dimmAttributes & BIT6) + mvOsOutput(" Analysis probe installed: Yes \n"); + else + mvOsOutput(" Analysis probe installed: No \n"); + } + + break; +/*----------------------------------------------------------------------------*/ + + case 22: /* Suported AutoPreCharge */ + mvOsOutput("\nModul Attributes (SPD Byte 22): \n"); + if (dimmInfo.memoryType == MEM_TYPE_SDRAM) + { + if ( spdRawData[i] & BIT0 ) + mvOsOutput(" Early Ras Precharge: Yes \n"); + else + mvOsOutput(" Early Ras Precharge: No \n"); + + if ( spdRawData[i] & BIT1 ) + mvOsOutput(" AutoPreCharge: Yes \n"); + else + mvOsOutput(" AutoPreCharge: No \n"); + + if ( spdRawData[i] & BIT2 ) + mvOsOutput(" Precharge All: Yes \n"); + else + mvOsOutput(" Precharge All: No \n"); + + if ( spdRawData[i] & BIT3 ) + mvOsOutput(" Write 1/ReadBurst: Yes \n"); + else + mvOsOutput(" Write 1/ReadBurst: No \n"); + + if ( spdRawData[i] & BIT4 ) + mvOsOutput(" lower VCC tolerance: 5%%\n"); + else + mvOsOutput(" lower VCC tolerance: 10%%\n"); + + if ( spdRawData[i] & BIT5 ) + mvOsOutput(" upper VCC tolerance: 5%%\n"); + else + mvOsOutput(" upper VCC tolerance: 10%%\n"); + } + else if (dimmInfo.memoryType == MEM_TYPE_DDR1) + { + if ( spdRawData[i] & BIT0 ) + mvOsOutput(" Supports Weak Driver: Yes \n"); + else + mvOsOutput(" Supports Weak Driver: No \n"); + + if ( !(spdRawData[i] & BIT4) ) + mvOsOutput(" lower VCC tolerance: 0.2V\n"); + + if ( !(spdRawData[i] & BIT5) ) + mvOsOutput(" upper VCC tolerance: 0.2V\n"); + + if ( spdRawData[i] & BIT6 ) + mvOsOutput(" Concurrent Auto Preharge: Yes \n"); + else + mvOsOutput(" Concurrent Auto Preharge: No \n"); + + if ( spdRawData[i] & BIT7 ) + mvOsOutput(" Supports Fast AP: Yes \n"); + else + mvOsOutput(" Supports Fast AP: No \n"); + } + else if (dimmInfo.memoryType == MEM_TYPE_DDR2) + { + if ( spdRawData[i] & BIT0 ) + mvOsOutput(" Supports Weak Driver: Yes \n"); + else + mvOsOutput(" Supports Weak Driver: No \n"); + } + break; +/*----------------------------------------------------------------------------*/ + + case 23: + /* Minimum Cycle Time At Maximum Cas Latancy Minus 1 (2nd highest CL) */ + leftOfPoint = (spdRawData[i] & 0xf0) >> 4; + rightOfPoint = (spdRawData[i] & 0x0f) * 10; + + /* DDR2 addition of right of point */ + if ((spdRawData[i] & 0x0f) == 0xA) + { + rightOfPoint = 25; + } + if ((spdRawData[i] & 0x0f) == 0xB) + { + rightOfPoint = 33; + } + if ((spdRawData[i] & 0x0f) == 0xC) + { + rightOfPoint = 66; + } + if ((spdRawData[i] & 0x0f) == 0xD) + { + rightOfPoint = 75; + } + + mvOsOutput("Minimum Cycle Time At 2nd highest CasLatancy" + "(0 = Not supported): %d.%d [ns]\n", + leftOfPoint, rightOfPoint ); + break; +/*----------------------------------------------------------------------------*/ + + case 24: /* Clock To Data Out 2nd highest Cas Latency Value*/ + div = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 10:100; + time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + + ((spdRawData[i] & 0x0f)); + leftOfPoint = time_tmp / div; + rightOfPoint = time_tmp % div; + mvOsOutput("Clock To Data Out (2nd CL value): %d.%d [ns]\n", + leftOfPoint, rightOfPoint); + break; +/*----------------------------------------------------------------------------*/ + + case 25: + /* Minimum Cycle Time At Maximum Cas Latancy Minus 2 (3rd highest CL) */ + if (dimmInfo.memoryType == MEM_TYPE_SDRAM) + { + leftOfPoint = (spdRawData[i] & 0xfc) >> 2; + rightOfPoint = (spdRawData[i] & 0x3) * 25; + } + else /* DDR1 or DDR2 */ + { + leftOfPoint = (spdRawData[i] & 0xf0) >> 4; + rightOfPoint = (spdRawData[i] & 0x0f) * 10; + + /* DDR2 addition of right of point */ + if ((spdRawData[i] & 0x0f) == 0xA) + { + rightOfPoint = 25; + } + if ((spdRawData[i] & 0x0f) == 0xB) + { + rightOfPoint = 33; + } + if ((spdRawData[i] & 0x0f) == 0xC) + { + rightOfPoint = 66; + } + if ((spdRawData[i] & 0x0f) == 0xD) + { + rightOfPoint = 75; + } + } + mvOsOutput("Minimum Cycle Time At 3rd highest CasLatancy" + "(0 = Not supported): %d.%d [ns]\n", + leftOfPoint, rightOfPoint ); + break; +/*----------------------------------------------------------------------------*/ + + case 26: /* Clock To Data Out 3rd highest Cas Latency Value*/ + if (dimmInfo.memoryType == MEM_TYPE_SDRAM) + { + leftOfPoint = (spdRawData[i] & 0xfc) >> 2; + rightOfPoint = (spdRawData[i] & 0x3) * 25; + } + else /* DDR1 or DDR2 */ + { + time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + + ((spdRawData[i] & 0x0f)); + leftOfPoint = 0; + rightOfPoint = time_tmp; + } + mvOsOutput("Clock To Data Out (3rd CL value): %d.%2d[ns]\n", + leftOfPoint, rightOfPoint ); + break; +/*----------------------------------------------------------------------------*/ + + case 27: /* Minimum Row Precharge Time */ + shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2; + maskLeftOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? + 0xff : 0xfc; + maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? + 0x00 : 0x03; + leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift); + rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25; + temp = ((leftOfPoint*100) + rightOfPoint);/* in 10ps Intervals*/ + trp_clocks = (temp + (busClkPs-1)) / busClkPs; + mvOsOutput("Minimum Row Precharge Time [ns]: %d.%d = " + "in Clk cycles %d\n", + leftOfPoint, rightOfPoint, trp_clocks); + break; +/*----------------------------------------------------------------------------*/ + + case 28: /* Minimum Row Active to Row Active Time */ + shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2; + maskLeftOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? + 0xff : 0xfc; + maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? + 0x00 : 0x03; + leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift); + rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25; + temp = ((leftOfPoint*100) + rightOfPoint);/* in 100ns Interval*/ + trrd_clocks = (temp + (busClkPs-1)) / busClkPs; + mvOsOutput("Minimum Row Active -To- Row Active Delay [ns]: " + "%d.%d = in Clk cycles %d\n", + leftOfPoint, rightOfPoint, trp_clocks); + break; +/*----------------------------------------------------------------------------*/ + + case 29: /* Minimum Ras-To-Cas Delay */ + shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2; + maskLeftOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? + 0xff : 0xfc; + maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? + 0x00 : 0x03; + leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift); + rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25; + temp = ((leftOfPoint*100) + rightOfPoint);/* in 100ns Interval*/ + trcd_clocks = (temp + (busClkPs-1) )/ busClkPs; + mvOsOutput("Minimum Ras-To-Cas Delay [ns]: %d.%d = " + "in Clk cycles %d\n", + leftOfPoint, rightOfPoint, trp_clocks); + break; +/*----------------------------------------------------------------------------*/ + + case 30: /* Minimum Ras Pulse Width */ + tras_clocks = (cas2ps(spdRawData[i])+(busClkPs-1)) / busClkPs; + mvOsOutput("Minimum Ras Pulse Width [ns]: %d = " + "in Clk cycles %d\n", spdRawData[i], tras_clocks); + break; +/*----------------------------------------------------------------------------*/ + + case 31: /* Module Bank Density */ + mvOsOutput("Module Bank Density (more than 1= Multisize-Module):"); + + if (dimmInfo.memoryType == MEM_TYPE_SDRAM) + { + if (dimmInfo.dimmBankDensity & BIT0) + mvOsOutput("1GB, "); + if (dimmInfo.dimmBankDensity & BIT1) + mvOsOutput("8MB, "); + if (dimmInfo.dimmBankDensity & BIT2) + mvOsOutput("16MB, "); + if (dimmInfo.dimmBankDensity & BIT3) + mvOsOutput("32MB, "); + if (dimmInfo.dimmBankDensity & BIT4) + mvOsOutput("64MB, "); + if (dimmInfo.dimmBankDensity & BIT5) + mvOsOutput("128MB, "); + if (dimmInfo.dimmBankDensity & BIT6) + mvOsOutput("256MB, "); + if (dimmInfo.dimmBankDensity & BIT7) + mvOsOutput("512MB, "); + } + else if (dimmInfo.memoryType == MEM_TYPE_DDR1) + { + if (dimmInfo.dimmBankDensity & BIT0) + mvOsOutput("1GB, "); + if (dimmInfo.dimmBankDensity & BIT1) + mvOsOutput("2GB, "); + if (dimmInfo.dimmBankDensity & BIT2) + mvOsOutput("16MB, "); + if (dimmInfo.dimmBankDensity & BIT3) + mvOsOutput("32MB, "); + if (dimmInfo.dimmBankDensity & BIT4) + mvOsOutput("64MB, "); + if (dimmInfo.dimmBankDensity & BIT5) + mvOsOutput("128MB, "); + if (dimmInfo.dimmBankDensity & BIT6) + mvOsOutput("256MB, "); + if (dimmInfo.dimmBankDensity & BIT7) + mvOsOutput("512MB, "); + } + else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */ + { + if (dimmInfo.dimmBankDensity & BIT0) + mvOsOutput("1GB, "); + if (dimmInfo.dimmBankDensity & BIT1) + mvOsOutput("2GB, "); + if (dimmInfo.dimmBankDensity & BIT2) + mvOsOutput("4GB, "); + if (dimmInfo.dimmBankDensity & BIT3) + mvOsOutput("8GB, "); + if (dimmInfo.dimmBankDensity & BIT4) + mvOsOutput("16GB, "); + if (dimmInfo.dimmBankDensity & BIT5) + mvOsOutput("128MB, "); + if (dimmInfo.dimmBankDensity & BIT6) + mvOsOutput("256MB, "); + if (dimmInfo.dimmBankDensity & BIT7) + mvOsOutput("512MB, "); + } + mvOsOutput("\n"); + break; +/*----------------------------------------------------------------------------*/ + + case 32: /* Address And Command Setup Time (measured in ns/1000) */ + if (dimmInfo.memoryType == MEM_TYPE_SDRAM) + { + rightOfPoint = (spdRawData[i] & 0x0f); + leftOfPoint = (spdRawData[i] & 0xf0) >> 4; + if(leftOfPoint > 7) + { + leftOfPoint *= -1; + } + } + else /* DDR1 or DDR2 */ + { + time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + + ((spdRawData[i] & 0x0f)); + leftOfPoint = time_tmp / 100; + rightOfPoint = time_tmp % 100; + } + mvOsOutput("Address And Command Setup Time [ns]: %d.%d\n", + leftOfPoint, rightOfPoint); + break; +/*----------------------------------------------------------------------------*/ + + case 33: /* Address And Command Hold Time */ + if (dimmInfo.memoryType == MEM_TYPE_SDRAM) + { + rightOfPoint = (spdRawData[i] & 0x0f); + leftOfPoint = (spdRawData[i] & 0xf0) >> 4; + if(leftOfPoint > 7) + { + leftOfPoint *= -1; + } + } + else /* DDR1 or DDR2 */ + { + time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + + ((spdRawData[i] & 0x0f)); + leftOfPoint = time_tmp / 100; + rightOfPoint = time_tmp % 100; + } + mvOsOutput("Address And Command Hold Time [ns]: %d.%d\n", + leftOfPoint, rightOfPoint); + break; +/*----------------------------------------------------------------------------*/ + + case 34: /* Data Input Setup Time */ + if (dimmInfo.memoryType == MEM_TYPE_SDRAM) + { + rightOfPoint = (spdRawData[i] & 0x0f); + leftOfPoint = (spdRawData[i] & 0xf0) >> 4; + if(leftOfPoint > 7) + { + leftOfPoint *= -1; + } + } + else /* DDR1 or DDR2 */ + { + time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + + ((spdRawData[i] & 0x0f)); + leftOfPoint = time_tmp / 100; + rightOfPoint = time_tmp % 100; + } + mvOsOutput("Data Input Setup Time [ns]: %d.%d\n", + leftOfPoint, rightOfPoint); + break; +/*----------------------------------------------------------------------------*/ + + case 35: /* Data Input Hold Time */ + if (dimmInfo.memoryType == MEM_TYPE_SDRAM) + { + rightOfPoint = (spdRawData[i] & 0x0f); + leftOfPoint = (spdRawData[i] & 0xf0) >> 4; + if(leftOfPoint > 7) + { + leftOfPoint *= -1; + } + } + else /* DDR1 or DDR2 */ + { + time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + + ((spdRawData[i] & 0x0f)); + leftOfPoint = time_tmp / 100; + rightOfPoint = time_tmp % 100; + } + mvOsOutput("Data Input Hold Time [ns]: %d.%d\n\n", + leftOfPoint, rightOfPoint); + break; +/*----------------------------------------------------------------------------*/ + + case 36: /* Relevant for DDR2 only: Write Recovery Time */ + leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> 2); + rightOfPoint = (spdRawData[i] & maskRightOfPoint) * 25; + mvOsOutput("Write Recovery Time [ns]: %d.%d\n", + leftOfPoint, rightOfPoint); + break; +/*----------------------------------------------------------------------------*/ + } + +} + + +/* + * translate ns.ns/10 coding of SPD timing values + * into ps unit values + */ +/******************************************************************************* +* cas2ps - Translate x.y ns parameter to pico-seconds values +* +* DESCRIPTION: +* This function translates x.y nano seconds to its value in pico seconds. +* For example 3.75ns will return 3750. +* +* INPUT: +* spd_byte - DIMM SPD byte. +* +* OUTPUT: +* None. +* +* RETURN: +* value in pico seconds. +* +*******************************************************************************/ +static MV_U32 cas2ps(MV_U8 spd_byte) +{ + MV_U32 ns, ns10; + + /* isolate upper nibble */ + ns = (spd_byte >> 4) & 0x0F; + /* isolate lower nibble */ + ns10 = (spd_byte & 0x0F); + + if( ns10 < 10 ) { + ns10 *= 10; + } + else if( ns10 == 10 ) + ns10 = 25; + else if( ns10 == 11 ) + ns10 = 33; + else if( ns10 == 12 ) + ns10 = 66; + else if( ns10 == 13 ) + ns10 = 75; + else + { + mvOsOutput("cas2ps Err. unsupported cycle time.\n"); + } + + return (ns*1000 + ns10*10); +} + diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/dram/mvDram.h linux-88fxx81/arch/arm/mach-mv88fxx81/Board/dram/mvDram.h --- linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/dram/mvDram.h 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/mach-mv88fxx81/Board/dram/mvDram.h 2006-08-30 19:27:36.000000000 +0930 @@ -0,0 +1,190 @@ +/******************************************************************************* +Copyright (C) Marvell International Ltd. and its affiliates + +This software file (the "File") is owned and distributed by Marvell +International Ltd. and/or its affiliates ("Marvell") under the following +alternative licensing terms. Once you have made an election to distribute the +File under one of the following license alternatives, please (i) delete this +introductory statement regarding license alternatives, (ii) delete the two +license alternatives that you have not elected to use and (iii) preserve the +Marvell copyright notice above. + +******************************************************************************** +Marvell Commercial License Option + +If you received this File from Marvell and you have entered into a commercial +license agreement (a "Commercial License") with Marvell, the File is licensed +to you under the terms of the applicable Commercial License. + +******************************************************************************** +Marvell GPL License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File in accordance with the terms and conditions of the General +Public License Version 2, June 1991 (the "GPL License"), a copy of which is +available along with the File in the license.txt file or by writing to the Free +Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or +on the worldwide web at http://www.gnu.org/licenses/gpl.txt. + +THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED +WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY +DISCLAIMED. The GPL License provides additional details about this warranty +disclaimer. +******************************************************************************** +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + * Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#ifndef __INCmvDram +#define __INCmvDram + +#include "mvDramIf.h" +#include "mvTwsi.h" + +#define MAX_DIMM_NUM 2 +#define SPD_SIZE 128 + +/* Dimm spd offsets */ +#define DIMM_MEM_TYPE 2 +#define DIMM_ROW_NUM 3 +#define DIMM_COL_NUM 4 +#define DIMM_MODULE_BANK_NUM 5 +#define DIMM_DATA_WIDTH 6 +#define DIMM_VOLT_IF 8 +#define DIMM_MIN_CC_AT_MAX_CAS 9 +#define DIMM_ERR_CHECK_TYPE 11 +#define DIMM_REFRESH_INTERVAL 12 +#define DIMM_SDRAM_WIDTH 13 +#define DIMM_ERR_CHECK_DATA_WIDTH 14 +#define DIMM_MIN_CLK_DEL 15 +#define DIMM_BURST_LEN_SUP 16 +#define DIMM_DEV_BANK_NUM 17 +#define DIMM_SUP_CAL 18 +#define DIMM_DDR2_TYPE_INFORMATION 20 /* DDR2 only */ +#define DIMM_BUF_ADDR_CONT_IN 21 +#define DIMM_MIN_CC_AT_MAX_CAS_MINUS1 23 +#define DIMM_MIN_CC_AT_MAX_CAS_MINUS2 25 +#define DIMM_MIN_ROW_PRECHARGE_TIME 27 +#define DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE 28 +#define DIMM_MIN_RAS_TO_CAS_DELAY 29 +#define DIMM_MIN_RAS_PULSE_WIDTH 30 +#define DIMM_BANK_DENSITY 31 +#define DIMM_MIN_WRITE_RECOVERY_TIME 36 +#define DIMM_MIN_WRITE_TO_READ_CMD_DELAY 37 +#define DIMM_MIN_READ_TO_PRECH_CMD_DELAY 38 +#define DIMM_MIN_REFRESH_TO_ACTIVATE_CMD 42 + +/* Dimm Memory Type values */ +#define DIMM_MEM_TYPE_SDRAM 0x4 +#define DIMM_MEM_TYPE_DDR1 0x7 +#define DIMM_MEM_TYPE_DDR2 0x8 + +#define DIMM_MODULE_MANU_OFFS 64 +#define DIMM_MODULE_MANU_SIZE 8 +#define DIMM_MODULE_VEN_OFFS 73 +#define DIMM_MODULE_VEN_SIZE 25 +#define DIMM_MODULE_ID_OFFS 99 +#define DIMM_MODULE_ID_SIZE 18 + +/* enumeration for voltage levels. */ +typedef enum _mvDimmVoltageIf +{ + TTL_5V_TOLERANT, + LVTTL, + HSTL_1_5V, + SSTL_3_3V, + SSTL_2_5V, + VOLTAGE_UNKNOWN, +} MV_DIMM_VOLTAGE_IF; + + +/* enumaration for SDRAM CAS Latencies. */ +typedef enum _mvDimmSdramCas +{ + SD_CL_1 =1, + SD_CL_2, + SD_CL_3, + SD_CL_4, + SD_CL_5, + SD_CL_6, + SD_CL_7, + SD_FAULT +}MV_DIMM_SDRAM_CAS; + + +/* DIMM information structure */ +typedef struct _mvDimmInfo +{ + MV_MEMORY_TYPE memoryType; /* DDR or SDRAM */ + + MV_U8 spdRawData[SPD_SIZE]; /* Content of SPD-EEPROM copied 1:1 */ + + /* DIMM dimensions */ + MV_U32 numOfRowAddr; + MV_U32 numOfColAddr; + MV_U32 numOfModuleBanks; + MV_U32 dataWidth; + MV_U32 errorCheckType; /* ECC , PARITY..*/ + MV_U32 sdramWidth; /* 4,8,16 or 32 */ + MV_U32 errorCheckDataWidth; /* 0 - no, 1 - Yes */ + MV_U32 burstLengthSupported; + MV_U32 numOfBanksOnEachDevice; + MV_U32 suportedCasLatencies; + MV_U32 refreshInterval; + MV_U32 dimmBankDensity; + MV_U32 dimmTypeInfo; /* DDR2 only */ + MV_U32 dimmAttributes; + + /* DIMM timing parameters */ + MV_U32 minCycleTimeAtMaxCasLatPs; + MV_U32 minCycleTimeAtMaxCasLatMinus1Ps; + MV_U32 minCycleTimeAtMaxCasLatMinus2Ps; + MV_U32 minRowPrechargeTime; + MV_U32 minRowActiveToRowActive; + MV_U32 minRasToCasDelay; + MV_U32 minRasPulseWidth; + MV_U32 minWriteRecoveryTime; /* DDR2 only */ + MV_U32 minWriteToReadCmdDelay; /* DDR2 only */ + MV_U32 minReadToPrechCmdDelay; /* DDR2 only */ + MV_U32 minRefreshToActiveCmd; /* DDR2 only */ + + /* Parameters calculated from the extracted DIMM information */ + MV_U32 size; /* 16,64,128,256 or 512 MByte in MB units */ + MV_U32 deviceDensity; /* 16,64,128,256 or 512 Mbit in MB units */ + MV_U32 numberOfDevices; + +} MV_DIMM_INFO; + + +MV_STATUS mvDramBankInfoGet(MV_U32 bankNum, MV_DRAM_BANK_INFO *pBankInfo); +MV_STATUS dimmSpdGet(MV_U32 dimmNum, MV_DIMM_INFO *pDimmInfo); +MV_VOID dimmSpdPrint(MV_U32 dimmNum); + +#endif /* __INCmvDram */ diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/ethPhy/mvEthPhy.c linux-88fxx81/arch/arm/mach-mv88fxx81/Board/ethPhy/mvEthPhy.c --- linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/ethPhy/mvEthPhy.c 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/mach-mv88fxx81/Board/ethPhy/mvEthPhy.c 2007-03-01 20:00:12.000000000 +1030 @@ -0,0 +1,721 @@ +/******************************************************************************* +Copyright (C) Marvell International Ltd. and its affiliates + +This software file (the "File") is owned and distributed by Marvell +International Ltd. and/or its affiliates ("Marvell") under the following +alternative licensing terms. Once you have made an election to distribute the +File under one of the following license alternatives, please (i) delete this +introductory statement regarding license alternatives, (ii) delete the two +license alternatives that you have not elected to use and (iii) preserve the +Marvell copyright notice above. + +******************************************************************************** +Marvell Commercial License Option + +If you received this File from Marvell and you have entered into a commercial +license agreement (a "Commercial License") with Marvell, the File is licensed +to you under the terms of the applicable Commercial License. + +******************************************************************************** +Marvell GPL License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File in accordance with the terms and conditions of the General +Public License Version 2, June 1991 (the "GPL License"), a copy of which is +available along with the File in the license.txt file or by writing to the Free +Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or +on the worldwide web at http://www.gnu.org/licenses/gpl.txt. + +THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED +WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY +DISCLAIMED. The GPL License provides additional details about this warranty +disclaimer. +******************************************************************************** +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + * Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#include "mvOs.h" +#include "mvCtrlEnvLib.h" +#include "mvEthPhy.h" + +#define PHY_UPDATE_TIMEOUT 10000 + + +static void switchVlanInit(MV_U32 ethPortNum, + MV_U32 switchCpuPort, + MV_U32 switchMaxPortsNum, + MV_U32 switchPortsOffset, + MV_U32 switchEnabledPortsMask); + +/******************************************************************************* +* mvEthPhyRegRead - Read from ethernet phy register. +* +* DESCRIPTION: +* This function reads ethernet phy register. +* +* INPUT: +* phyAddr - Phy address. +* regOffs - Phy register offset. +* +* OUTPUT: +* None. +* +* RETURN: +* 16bit phy register value, or 0xffff on error +* +*******************************************************************************/ +MV_STATUS mvEthPhyRegRead(MV_U32 phyAddr, MV_U32 regOffs, MV_U16 *data) +{ + MV_U32 smiReg; + volatile MV_U32 timeout; + + /* check parameters */ + if ((phyAddr << ETH_PHY_SMI_DEV_ADDR_OFFS) & ~ETH_PHY_SMI_DEV_ADDR_MASK) + { + mvOsPrintf("mvEthPhyRegRead: Err. Illigal PHY device address %d\n", + phyAddr); + return MV_FAIL; + } + if ((regOffs << ETH_PHY_SMI_REG_ADDR_OFFS) & ~ETH_PHY_SMI_REG_ADDR_MASK) + { + mvOsPrintf("mvEthPhyRegRead: Err. Illigal PHY register offset %d\n", + regOffs); + return MV_FAIL; + } + + timeout = ETH_PHY_TIMEOUT; + /* wait till the SMI is not busy*/ + do + { + /* read smi register */ + smiReg = MV_REG_READ(ETH_PHY_SMI_REG); + if (timeout-- == 0) + { + mvOsPrintf("mvEthPhyRegRead: SMI busy timeout\n"); + return MV_FAIL; + } + }while (smiReg & ETH_PHY_SMI_BUSY_MASK); + + /* fill the phy address and regiser offset and read opcode */ + smiReg = (phyAddr << ETH_PHY_SMI_DEV_ADDR_OFFS) | (regOffs << ETH_PHY_SMI_REG_ADDR_OFFS )| + ETH_PHY_SMI_OPCODE_READ; + + /* write the smi register */ + MV_REG_WRITE(ETH_PHY_SMI_REG, smiReg); + + timeout=ETH_PHY_TIMEOUT; + + /*wait till readed value is ready */ + do + { + /* read smi register */ + smiReg=MV_REG_READ(ETH_PHY_SMI_REG); + + if (timeout-- == 0) { + mvOsPrintf("mvEthPhyRegRead: SMI read-valid timeout\n"); + return MV_FAIL; + } + }while (!(smiReg & ETH_PHY_SMI_READ_VALID_MASK)); + + /* Wait for the data to update in the SMI register */ + for(timeout = 0 ; timeout < PHY_UPDATE_TIMEOUT ; timeout++); + + *data = (MV_U16)( MV_REG_READ(ETH_PHY_SMI_REG) & ETH_PHY_SMI_DATA_MASK); + return MV_OK; +} + +/******************************************************************************* +* mvEthPhyRegWrite - Write to ethernet phy register. +* +* DESCRIPTION: +* This function write to ethernet phy register. +* +* INPUT: +* phyAddr - Phy address. +* regOffs - Phy register offset. +* data - 16bit data. +* +* OUTPUT: +* None. +* +* RETURN: +* MV_OK if write succeed, MV_BAD_PARAM on bad parameters , MV_ERROR on error . +* MV_TIMEOUT on timeout +* +*******************************************************************************/ +MV_STATUS mvEthPhyRegWrite(MV_U32 phyAddr, MV_U32 regOffs, MV_U16 data) +{ + MV_U32 smiReg; + volatile MV_U32 timeout; + + /* check parameters */ + if ((phyAddr << ETH_PHY_SMI_DEV_ADDR_OFFS) & ~ETH_PHY_SMI_DEV_ADDR_MASK) + { + mvOsPrintf("mvEthPhyRegWrite: Err. Illigal phy address \n"); + return MV_BAD_PARAM; + } + if ((regOffs << ETH_PHY_SMI_REG_ADDR_OFFS) & ~ETH_PHY_SMI_REG_ADDR_MASK) + { + mvOsPrintf("mvEthPhyRegWrite: Err. Illigal register offset \n"); + return MV_BAD_PARAM; + } + + timeout=ETH_PHY_TIMEOUT; + + /* wait till the SMI is not busy*/ + do + { + /* read smi register */ + smiReg=MV_REG_READ(ETH_PHY_SMI_REG); + if (timeout-- == 0) { + mvOsPrintf("mvEthPhyRegWrite: SMI busy timeout\n"); + return MV_TIMEOUT; + } + }while (smiReg & ETH_PHY_SMI_BUSY_MASK); + + /* fill the phy address and regiser offset and write opcode and data*/ + smiReg = (data << ETH_PHY_SMI_DATA_OFFS); + smiReg |= (phyAddr << ETH_PHY_SMI_DEV_ADDR_OFFS) | (regOffs << ETH_PHY_SMI_REG_ADDR_OFFS ); + smiReg &= ~ETH_PHY_SMI_OPCODE_READ; + + /* write the smi register */ + MV_REG_WRITE(ETH_PHY_SMI_REG, smiReg); + + return MV_OK; + + +} + +/******************************************************************************* +* mvEthPhyReset - Reset ethernet Phy. +* +* DESCRIPTION: +* This function resets a given ethernet Phy. +* +* INPUT: +* phyAddr - Phy address. +* timeout - in millisec +* +* OUTPUT: +* None. +* +* RETURN: MV_OK - Success +* MV_TIMEOUT - Timeout +* +*******************************************************************************/ +MV_STATUS mvEthPhyReset(MV_U32 phyAddr, int timeout) +{ + MV_U16 phyRegData; + + /* Reset the PHY */ + if(mvEthPhyRegRead(phyAddr, ETH_PHY_CTRL_REG, &phyRegData) != MV_OK) + return MV_FAIL; + /* Set bit 15 to reset the PHY */ + phyRegData |= ETH_PHY_CTRL_RESET_MASK; + mvEthPhyRegWrite(phyAddr, ETH_PHY_CTRL_REG, phyRegData); + + /* Wait untill Auotonegotiation completed */ + while(timeout > 0) + { + mvOsSleep(100); + timeout -= 100; + + if( mvEthPhyRegRead(phyAddr, ETH_PHY_STATUS_REG, &phyRegData) != MV_OK) + return MV_FAIL; + if(phyRegData & ETH_PHY_STATUS_AN_DONE_MASK) + return MV_OK; + } + return MV_TIMEOUT; +} + + +/******************************************************************************* +* mvEthPhyRestartAN - Restart ethernet Phy Auto-Negotiation. +* +* DESCRIPTION: +* This function resets a given ethernet Phy. +* +* INPUT: +* phyAddr - Phy address. +* timeout - in millisec +* +* OUTPUT: +* None. +* +* RETURN: MV_OK - Success +* MV_TIMEOUT - Timeout +* +*******************************************************************************/ +MV_STATUS mvEthPhyRestartAN(MV_U32 phyAddr, int timeout) +{ + MV_U16 phyRegData; + + /* Reset the PHY */ + if(mvEthPhyRegRead (phyAddr, ETH_PHY_CTRL_REG, &phyRegData) != MV_OK) + return MV_FAIL; + /* Set bit 12 to Enable autonegotiation of the PHY */ + phyRegData |= ETH_PHY_CTRL_AN_ENABLE_MASK; + /* Set bit 9 to Restart autonegotiation of the PHY */ + phyRegData |= ETH_PHY_CTRL_AN_RESTART_MASK; + mvEthPhyRegWrite(phyAddr, ETH_PHY_CTRL_REG, phyRegData); + + /* Wait untill Auotonegotiation completed */ + while(timeout > 0) + { + mvOsSleep(100); + timeout -= 100; + + if( mvEthPhyRegRead(phyAddr, ETH_PHY_STATUS_REG, &phyRegData) != MV_OK) + return MV_FAIL; + if(phyRegData & ETH_PHY_STATUS_AN_DONE_MASK) + return MV_OK; + } + return MV_TIMEOUT; +} + + +/******************************************************************************* +* mvEthPhyCheckLink - +* +* DESCRIPTION: +* check link in phy port +* +* INPUT: +* phyAddr - Phy address. +* +* OUTPUT: +* None. +* +* RETURN: MV_TRUE if link is up, MV_FALSE if down +* +*******************************************************************************/ +MV_BOOL mvEthPhyCheckLink( MV_U32 phyAddr ) +{ + MV_U16 val_st, val_ctrl, val_spec_st; + + /* read status reg */ + if( mvEthPhyRegRead( phyAddr, ETH_PHY_STATUS_REG, &val_st) != MV_OK ) + return MV_FALSE; + + /* read control reg */ + if( mvEthPhyRegRead( phyAddr, ETH_PHY_CTRL_REG, &val_ctrl) != MV_OK ) + return MV_FALSE; + + /* read special status reg */ + if( mvEthPhyRegRead( phyAddr, ETH_PHY_SPEC_STATUS_REG, &val_spec_st) != MV_OK ) + return MV_FALSE; + + if(val_ctrl & ETH_PHY_CTRL_AN_ENABLE_MASK) + { + if(val_st & ETH_PHY_STATUS_AN_DONE_MASK) + return MV_TRUE; + else + return MV_FALSE; + } + else + { + if(val_spec_st & ETH_PHY_SPEC_STATUS_LINK_MASK) + return MV_TRUE; + } + return MV_FALSE; +} + +/******************************************************************************* +* mvEthPhyPrintStatus - +* +* DESCRIPTION: +* print port Speed, Duplex, Auto-negotiation, Link. +* +* INPUT: +* phyAddr - Phy address. +* +* OUTPUT: +* None. +* +* RETURN: 16bit phy register value, or 0xffff on error +* +*******************************************************************************/ +MV_STATUS mvEthPhyPrintStatus( MV_U32 phyAddr ) +{ + MV_U16 val; + + /* read control reg */ + if( mvEthPhyRegRead( phyAddr, ETH_PHY_CTRL_REG, &val) != MV_OK ) + return MV_ERROR; + + if( val & ETH_PHY_CTRL_AN_ENABLE_MASK ) + mvOsOutput( "Auto negotiation: Enabled\n" ); + else + mvOsOutput( "Auto negotiation: Disabled\n" ); + + + /* read specific status reg */ + if( mvEthPhyRegRead( phyAddr, ETH_PHY_SPEC_STATUS_REG, &val) != MV_OK ) + return MV_ERROR; + + switch (val & ETH_PHY_SPEC_STATUS_SPEED_MASK) + { + case ETH_PHY_SPEC_STATUS_SPEED_1000MBPS: + mvOsOutput( "Speed: 1000 Mbps\n" ); + break; + case ETH_PHY_SPEC_STATUS_SPEED_100MBPS: + mvOsOutput( "Speed: 100 Mbps\n" ); + break; + case ETH_PHY_SPEC_STATUS_SPEED_10MBPS: + mvOsOutput( "Speed: 10 Mbps\n" ); + default: + mvOsOutput( "Speed: Uknown\n" ); + break; + + } + + if( val & ETH_PHY_SPEC_STATUS_DUPLEX_MASK ) + mvOsOutput( "Duplex: Full\n" ); + else + mvOsOutput( "Duplex: Half\n" ); + + + if( val & ETH_PHY_SPEC_STATUS_LINK_MASK ) + mvOsOutput("Link: up\n"); + else + mvOsOutput("Link: down\n"); + + return MV_OK; +} + +/******************************************************************************* +* mvEthE1111PhyBasicInit - +* +* DESCRIPTION: +* Do a basic Init to the Phy , including reset +* +* INPUT: +* ethPortNum - Ethernet port number +* +* OUTPUT: +* None. +* +* RETURN: None +* +*******************************************************************************/ +MV_VOID mvEthE1111PhyBasicInit(MV_U32 ethPortNum) +{ + MV_U16 reg; + + + /* Phy recv and tx delay */ + mvEthPhyRegRead(mvBoardPhyAddrGet(ethPortNum),20,®); + reg |= BIT1 | BIT7; + mvEthPhyRegWrite(mvBoardPhyAddrGet(ethPortNum),20,reg); + + /* Leds link and activity*/ + mvEthPhyRegWrite(mvBoardPhyAddrGet(ethPortNum),24,0x4111); + + /* reset the phy */ + mvEthPhyRegRead(mvBoardPhyAddrGet(ethPortNum),0,®); + reg |= BIT15; + mvEthPhyRegWrite(mvBoardPhyAddrGet(ethPortNum),0,reg); + + if ( RD_88F5181_POS_NAS == mvBoardIdGet()) + { + mvEthPhyRegWrite(mvBoardPhyAddrGet(ethPortNum),0x18,0x4151); + } + +} + + +MV_VOID mvEthE1116PhyBasicInit(MV_U32 ethPortNum) +{ + + MV_U16 reg; + + /* Access Page 3*/ + mvEthPhyRegWrite(mvBoardPhyAddrGet(ethPortNum),22,0x3); + + + + /* Leds link and activity*/ + mvEthPhyRegRead(mvBoardPhyAddrGet(ethPortNum),16,®); + reg &= ~0xf; + reg |= 0x1; + mvEthPhyRegWrite(mvBoardPhyAddrGet(ethPortNum),16,reg); + +} + +/******************************************************************************* +* mvEthE1011PhyBasicInit - +* +* DESCRIPTION: +* Do a basic Init to the Phy , including reset +* +* INPUT: +* ethPortNum - Ethernet port number +* +* OUTPUT: +* None. +* +* RETURN: None +* +*******************************************************************************/ +MV_VOID mvEthE1011PhyBasicInit(MV_U32 ethPortNum) +{ + MV_U16 reg; + + /* Phy recv and tx delay */ + mvEthPhyRegRead(mvBoardPhyAddrGet(ethPortNum),20,®); + reg &= ~(BIT1 | BIT7); + mvEthPhyRegWrite(mvBoardPhyAddrGet(ethPortNum),20,reg); + + /* Leds link and activity*/ + mvEthPhyRegWrite(mvBoardPhyAddrGet(ethPortNum),24,0x4111); + + /* reset the phy */ + mvEthPhyRegRead(mvBoardPhyAddrGet(ethPortNum),0, ®); + reg |= BIT15; + mvEthPhyRegWrite(mvBoardPhyAddrGet(ethPortNum),0,reg); + +} + +/******************************************************************************* +* mvEthE6065_61PhyBasicInit - +* +* DESCRIPTION: +* Do a basic Init to the Phy , including reset +* +* INPUT: +* ethPortNum - Ethernet port number +* +* OUTPUT: +* None. +* +* RETURN: None +* +*******************************************************************************/ +MV_VOID mvEthE6065_61PhyBasicInit(MV_U32 ethPortNum) +{ + switchVlanInit(ethPortNum, + MV_E6065_CPU_PORT, + MV_E6065_MAX_PORTS_NUM, + MV_E6065_PORTS_OFFSET, + MV_E6065_ENABLED_PORTS); +} + +/******************************************************************************* +* mvEthE6063PhyBasicInit - +* +* DESCRIPTION: +* Do a basic Init to the Phy , including reset +* +* INPUT: +* ethPortNum - Ethernet port number +* +* OUTPUT: +* None. +* +* RETURN: None +* +*******************************************************************************/ +MV_VOID mvEthE6063PhyBasicInit(MV_U32 ethPortNum) +{ + switchVlanInit(ethPortNum, + MV_E6063_CPU_PORT, + MV_E6063_MAX_PORTS_NUM, + MV_E6063_PORTS_OFFSET, + MV_E6063_ENABLED_PORTS); +} + +/******************************************************************************* +* mvEthE6131PhyBasicInit - +* +* DESCRIPTION: +* Do a basic Init to the Phy , including reset +* +* INPUT: +* ethPortNum - Ethernet port number +* +* OUTPUT: +* None. +* +* RETURN: None +* +*******************************************************************************/ +MV_VOID mvEthE6131PhyBasicInit(MV_U32 ethPortNum) +{ + + MV_U16 reg; + + /*Enable Phy power up*/ + mvEthPhyRegWrite (0,0,0x9140); + mvEthPhyRegWrite (1,0,0x9140); + mvEthPhyRegWrite (2,0,0x9140); + + + /*Enable PPU*/ + mvEthPhyRegWrite (0x1b,4,0xC080); // from 4080 to C080 by Freecom + + + /*Enable Phy detection*/ + mvEthPhyRegRead (0x13,0,®); + reg &= ~(1<<12); + mvEthPhyRegWrite (0x13,0,reg); + + mvOsDelay(100); + mvEthPhyRegWrite (0x13,1,0x33); + + + switchVlanInit(ethPortNum, + MV_E6131_CPU_PORT, + MV_E6131_MAX_PORTS_NUM, + MV_E6131_PORTS_OFFSET, + MV_E6131_ENABLED_PORTS); + +} + + +static void switchVlanInit(MV_U32 ethPortNum, + MV_U32 switchCpuPort, + MV_U32 switchMaxPortsNum, + MV_U32 switchPortsOffset, + MV_U32 switchEnabledPortsMask) +{ + MV_U32 prt; + MV_U16 reg; + + /* be sure all ports are disabled */ + for(prt=0; prt < switchMaxPortsNum; prt++) + { + mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt), + MV_SWITCH_PORT_CONTROL_REG,®); + reg &= ~0x3; + mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt), + MV_SWITCH_PORT_CONTROL_REG,reg); + + } + + /* Set CPU port VID to 0x1 */ + mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(switchCpuPort), + MV_SWITCH_PORT_VID_REG,®); + reg &= ~0xfff; + reg |= 0x1; + mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(switchCpuPort), + MV_SWITCH_PORT_VID_REG,reg); + + + /* Setting Port default priority for all ports to zero */ + for(prt=0; prt < switchMaxPortsNum; prt++) + { + + mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt), + MV_SWITCH_PORT_VID_REG,®); + reg &= ~0xc000; + mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt), + MV_SWITCH_PORT_VID_REG,reg); + } + + /* Setting VID and VID map for all ports except CPU port */ + for(prt=0; prt < switchMaxPortsNum; prt++) + { + + /* only for enabled ports */ + if ((1 << prt)& switchEnabledPortsMask) + { + /* skip CPU port */ + if (prt== switchCpuPort) continue; + + /* + * set Ports VLAN Mapping. + * port prt <--> MV_SWITCH_CPU_PORT VLAN #prt+1. + */ + + mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt), + MV_SWITCH_PORT_VID_REG,®); + reg &= ~0x0fff; + reg |= (prt+1); + mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt), + MV_SWITCH_PORT_VID_REG,reg); + + + /* Set Vlan map table for all ports to send only to MV_SWITCH_CPU_PORT */ + mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt), + MV_SWITCH_PORT_VMAP_REG,®); + reg &= ~((1 << switchMaxPortsNum) - 1); + reg |= (1 << switchCpuPort); + mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt), + MV_SWITCH_PORT_VMAP_REG,reg); + } + + } + + + /* Set Vlan map table for MV_SWITCH_CPU_PORT to see all ports*/ + mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(switchCpuPort), + MV_SWITCH_PORT_VMAP_REG,®); + reg &= ~((1 << switchMaxPortsNum) - 1); + reg |= switchEnabledPortsMask & ~(1 << switchCpuPort); + mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(switchCpuPort), + MV_SWITCH_PORT_VMAP_REG,reg); + + + /*enable only appropriate ports to forwarding mode - and disable the others*/ + for(prt=0; prt < switchMaxPortsNum; prt++) + { + + if ((1 << prt)& switchEnabledPortsMask) + { + mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt), + MV_SWITCH_PORT_CONTROL_REG,®); + reg |= 0x3; + mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt), + MV_SWITCH_PORT_CONTROL_REG,reg); + + } + else + { + /* Disable port 6 */ + mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt), + MV_SWITCH_PORT_CONTROL_REG,®); + reg &= ~0x3; + mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt), + MV_SWITCH_PORT_CONTROL_REG,reg); + + } + } + + + return; + +} + + + + + + diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/ethPhy/mvEthPhy.h linux-88fxx81/arch/arm/mach-mv88fxx81/Board/ethPhy/mvEthPhy.h --- linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/ethPhy/mvEthPhy.h 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/mach-mv88fxx81/Board/ethPhy/mvEthPhy.h 2006-08-30 21:51:30.000000000 +0930 @@ -0,0 +1,89 @@ +/******************************************************************************* +Copyright (C) Marvell International Ltd. and its affiliates + +This software file (the "File") is owned and distributed by Marvell +International Ltd. and/or its affiliates ("Marvell") under the following +alternative licensing terms. Once you have made an election to distribute the +File under one of the following license alternatives, please (i) delete this +introductory statement regarding license alternatives, (ii) delete the two +license alternatives that you have not elected to use and (iii) preserve the +Marvell copyright notice above. + +******************************************************************************** +Marvell Commercial License Option + +If you received this File from Marvell and you have entered into a commercial +license agreement (a "Commercial License") with Marvell, the File is licensed +to you under the terms of the applicable Commercial License. + +******************************************************************************** +Marvell GPL License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File in accordance with the terms and conditions of the General +Public License Version 2, June 1991 (the "GPL License"), a copy of which is +available along with the File in the license.txt file or by writing to the Free +Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or +on the worldwide web at http://www.gnu.org/licenses/gpl.txt. + +THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED +WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY +DISCLAIMED. The GPL License provides additional details about this warranty +disclaimer. +******************************************************************************** +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + * Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#ifndef __INCETHPHYH +#define __INCETHPHYH + +#include "mvTypes.h" +#include "mvEthPhyRegs.h" + + +#define MV_ETH_PHY_TYPE RGMII /* can be RGMII/GMII/FIFO etc defined in CHAL eth HW library */ + +MV_STATUS mvEthPhyRegRead(MV_U32 phyAddr, MV_U32 regOffs, MV_U16 *data); +MV_STATUS mvEthPhyRegWrite(MV_U32 phyAddr, MV_U32 regOffs, MV_U16 data); +MV_STATUS mvEthPhyReset(MV_U32 phyAddr, int timeout); +MV_STATUS mvEthPhyRestartAN(MV_U32 phyAddr, int timeout); +MV_BOOL mvEthPhyCheckLink( MV_U32 phyAddr ); +MV_STATUS mvEthPhyPrintStatus( MV_U32 phyAddr ); + +MV_VOID mvEthE1111PhyBasicInit(MV_U32 ethPortNum); +MV_VOID mvEthE1116PhyBasicInit(MV_U32 ethPortNum); +MV_VOID mvEthE1011PhyBasicInit(MV_U32 ethPortNum); +MV_VOID mvEthE6063PhyBasicInit(MV_U32 ethPortNum); +MV_VOID mvEthE6065_61PhyBasicInit(MV_U32 ethPortNum); +MV_VOID mvEthE6131PhyBasicInit(MV_U32 ethPortNum); + + +#endif /* #ifndef __INCETHPHYH */ diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/ethPhy/mvEthPhyRegs.h linux-88fxx81/arch/arm/mach-mv88fxx81/Board/ethPhy/mvEthPhyRegs.h --- linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/ethPhy/mvEthPhyRegs.h 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/mach-mv88fxx81/Board/ethPhy/mvEthPhyRegs.h 2006-08-30 19:27:36.000000000 +0930 @@ -0,0 +1,189 @@ +/******************************************************************************* +Copyright (C) Marvell International Ltd. and its affiliates + +This software file (the "File") is owned and distributed by Marvell +International Ltd. and/or its affiliates ("Marvell") under the following +alternative licensing terms. Once you have made an election to distribute the +File under one of the following license alternatives, please (i) delete this +introductory statement regarding license alternatives, (ii) delete the two +license alternatives that you have not elected to use and (iii) preserve the +Marvell copyright notice above. + +******************************************************************************** +Marvell Commercial License Option + +If you received this File from Marvell and you have entered into a commercial +license agreement (a "Commercial License") with Marvell, the File is licensed +to you under the terms of the applicable Commercial License. + +******************************************************************************** +Marvell GPL License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File in accordance with the terms and conditions of the General +Public License Version 2, June 1991 (the "GPL License"), a copy of which is +available along with the File in the license.txt file or by writing to the Free +Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or +on the worldwide web at http://www.gnu.org/licenses/gpl.txt. + +THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED +WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY +DISCLAIMED. The GPL License provides additional details about this warranty +disclaimer. +******************************************************************************** +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + * Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#ifndef __INCethphyregsh +#define __INCethphyregsh + +#include "mvCtrlEnvSpec.h" + +/* defines */ +#define ETH_PHY_TIMEOUT 10000 + +/* registers offsetes defines */ +#ifdef MV_88W8660 +#define ETH_PHY_SMI_REG (ETH_REG_BASE + 0x6010) +#else +#define ETH_PHY_SMI_REG (ETH_REG_BASE + 0x004) +#endif + +/* SMI register fields (ETH_PHY_SMI_REG) */ + +#define ETH_PHY_SMI_DATA_OFFS 0 /* Data */ +#define ETH_PHY_SMI_DATA_MASK (0xffff << ETH_PHY_SMI_DATA_OFFS) + +#define ETH_PHY_SMI_DEV_ADDR_OFFS 16 /* PHY device address */ +#define ETH_PHY_SMI_DEV_ADDR_MASK (0x1f << ETH_PHY_SMI_DEV_ADDR_OFFS) + +#define ETH_PHY_SMI_REG_ADDR_OFFS 21 /* PHY device register address */ +#define ETH_PHY_SMI_REG_ADDR_MASK (0x1f << ETH_PHY_SMI_REG_ADDR_OFFS) + +#define ETH_PHY_SMI_OPCODE_OFFS 26 /* Write/Read opcode */ +#define ETH_PHY_SMI_OPCODE_MASK (3 << ETH_PHY_SMI_OPCODE_OFFS) +#define ETH_PHY_SMI_OPCODE_WRITE (0 << ETH_PHY_SMI_OPCODE_OFFS) +#define ETH_PHY_SMI_OPCODE_READ (1 << ETH_PHY_SMI_OPCODE_OFFS) + +#define ETH_PHY_SMI_READ_VALID_BIT 27 /* Read Valid */ +#define ETH_PHY_SMI_READ_VALID_MASK (1 << ETH_PHY_SMI_READ_VALID_BIT) + +#define ETH_PHY_SMI_BUSY_BIT 28 /* Busy */ +#define ETH_PHY_SMI_BUSY_MASK (1 << ETH_PHY_SMI_BUSY_BIT) + +/* PHY registers and bits */ +#define ETH_PHY_CTRL_REG 0 +#define ETH_PHY_STATUS_REG 1 +#define ETH_PHY_AUTONEGO_AD_REG 0x4 +#define ETH_PHY_SPEC_STATUS_REG 17 + +/* ETH_PHY_CTRL_REG bits */ +#define ETH_PHY_CTRL_SPEED_MSB_BIT 6 +#define ETH_PHY_CTRL_SPEED_MSB_MASK (1 << ETH_PHY_CTRL_SPEED_MSB_BIT) + +#define ETH_PHY_CTRL_COLISION_TEST_BIT 7 +#define ETH_PHY_CTRL_COLISION_TEST_MASK (1 << ETH_PHY_CTRL_COLISION_TEST_BIT) + +#define ETH_PHY_CTRL_DUPLEX_BIT 8 +#define ETH_PHY_CTRL_DUPLEX_MASK (1 << ETH_PHY_CTRL_DUPLEX_BIT) + +#define ETH_PHY_CTRL_AN_RESTART_BIT 9 +#define ETH_PHY_CTRL_AN_RESTART_MASK (1 << ETH_PHY_CTRL_AN_RESTART_BIT) + +#define ETH_PHY_CTRL_ISOLATE_BIT 10 +#define ETH_PHY_CTRL_ISOLATE_MASK (1 << ETH_PHY_CTRL_ISOLATE_BIT) + +#define ETH_PHY_CTRL_POWER_DOWN_BIT 11 +#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT) + +#define ETH_PHY_CTRL_AN_ENABLE_BIT 12 +#define ETH_PHY_CTRL_AN_ENABLE_MASK (1 << ETH_PHY_CTRL_AN_ENABLE_BIT) + +#define ETH_PHY_CTRL_SPEED_LSB_BIT 13 +#define ETH_PHY_CTRL_SPEED_LSB_MASK (1 << ETH_PHY_CTRL_SPEED_LSB_BIT) + +#define ETH_PHY_CTRL_LOOPBACK_BIT 14 +#define ETH_PHY_CTRL_LOOPBACK_MASK (1 << ETH_PHY_CTRL_LOOPBACK_BIT) + +#define ETH_PHY_CTRL_RESET_BIT 15 +#define ETH_PHY_CTRL_RESET_MASK (1 << ETH_PHY_CTRL_RESET_BIT) + +/* ETH_PHY_STATUS_REG bits */ +#define ETH_PHY_STATUS_AN_DONE_BIT 5 +#define ETH_PHY_STATUS_AN_DONE_MASK (1 << ETH_PHY_STATUS_AN_DONE_BIT) + +/* ETH_PHY_SPEC_STATUS_REG bits */ +#define ETH_PHY_SPEC_STATUS_SPEED_OFFS 14 +#define ETH_PHY_SPEC_STATUS_SPEED_MASK (0x3 << ETH_PHY_SPEC_STATUS_SPEED_OFFS) + +#define ETH_PHY_SPEC_STATUS_SPEED_10MBPS (0x0 << ETH_PHY_SPEC_STATUS_SPEED_OFFS) +#define ETH_PHY_SPEC_STATUS_SPEED_100MBPS (0x1 << ETH_PHY_SPEC_STATUS_SPEED_OFFS) +#define ETH_PHY_SPEC_STATUS_SPEED_1000MBPS (0x2 << ETH_PHY_SPEC_STATUS_SPEED_OFFS) + + +#define ETH_PHY_SPEC_STATUS_DUPLEX_BIT 13 +#define ETH_PHY_SPEC_STATUS_DUPLEX_MASK (0x1 << ETH_PHY_SPEC_STATUS_DUPLEX_BIT) + +#define ETH_PHY_SPEC_STATUS_LINK_BIT 10 +#define ETH_PHY_SPEC_STATUS_LINK_MASK (0x1 << ETH_PHY_SPEC_STATUS_LINK_BIT) + + + +#define MV_SWITCH_PORT_CONTROL_REG 0x4 +#define MV_SWITCH_PORT_VMAP_REG 0x6 +#define MV_SWITCH_PORT_VID_REG 0x7 + + +#define MV_SWITCH_PORT_OFFSET(port) (switchPortsOffset+port) + +/* E6063 related */ +#define MV_E6063_CPU_PORT 5 +#define MV_E6063_PORTS_OFFSET 0x8 +#define MV_E6063_MAX_PORTS_NUM 7 +#define MV_E6063_ENABLED_PORTS ((1 << 0)|(1 << 1)|(1 << 2)| \ + (1 << 3)|(1 << 4)|(1 << 5)) + +/* E6065 related */ +#define MV_E6065_CPU_PORT 5 +#define MV_E6065_PORTS_OFFSET 0x8 +#define MV_E6065_MAX_PORTS_NUM 6 +#define MV_E6065_ENABLED_PORTS ((1 << 0)|(1 << 1)|(1 << 2)|(1 << 3)|(1 << 4)|(1 << 5)) + +/* E6063 related */ +#define MV_E6131_CPU_PORT 0x3 +#define MV_E6131_PORTS_OFFSET 0x10 +#define MV_E6131_MAX_PORTS_NUM 8 +#define MV_E6131_ENABLED_PORTS ((1 << 0)|(1 << 1)|(1 << 2)| \ + (1 << 3)|(1 << 5)|(1 << 7)) + + + +#endif /* __INCethphyregsh */ diff -BurN --ignore-matching-lines='$\(Header\|Id\|Source\|Revision\|Date\)\($\|:\)' linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/flash/mvAmdFlash.c linux-88fxx81/arch/arm/mach-mv88fxx81/Board/flash/mvAmdFlash.c --- linux-2.6.12.6-armeb/arch/arm/mach-mv88fxx81/Board/flash/mvAmdFlash.c 1970-01-01 09:30:00.000000000 +0930 +++ linux-88fxx81/arch/arm/mach-mv88fxx81/Board/flash/mvAmdFlash.c 2006-08-30 19:27:36.000000000 +0930 @@ -0,0 +1,279 @@ +/******************************************************************************* +Copyright (C) Marvell International Ltd. and its affiliates + +This software file (the "File") is owned and distributed by Marvell +International Ltd. and/or its affiliates ("Marvell") under the following +alternative licensing terms. Once you have made an election to distribute the +File under one of the following license alternatives, please (i) delete this +introductory statement regarding license alternatives, (ii) delete the two +license alternatives that you have not elected to use and (iii) preserve the +Marvell copyright notice above. + +******************************************************************************** +Marvell Commercial License Option + +If you received this File from Marvell and you have entered into a commercial +license agreement (a "Commercial License") with Marvell, the File is licensed +to you under the terms of the applicable Commercial License. + +******************************************************************************** +Marvell GPL License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File in accordance with the terms and conditions of the General +Public License Version 2, June 1991 (the "GPL License"), a copy of which is +available along with the File in the license.txt file or by writing to the Free +Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or +on the worldwide web at http://www.gnu.org/licenses/gpl.txt. + +THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED +WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY +DISCLAIMED. The GPL License provides additional details about this warranty +disclaimer. +******************************************************************************** +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + * Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#include "mvFlash.h" + +#ifdef MV_DEBUG +#define DB(x) x +#else +#define DB(x) +#endif + +static MV_BOOL amdFlashStsIsRdy(MV_FLASH_INFO *pFlash, MV_U32 offset, + MV_U32 excepted); +static MV_VOID amdFlashUnlock(MV_FLASH_INFO *pFlash); + +/******************************************************************************* +* reset the flash +*******************************************************************************/ +MV_VOID amdFlashReset(MV_FLASH_INFO *pFlash) +{ + flashCmdSet(pFlash, 0, 0, AMD_CHIP_CMD_RST); + return; +} + +/******************************************************************************* +* amdFlashSecErase - Erase a sector. +* +* DESCRIPTION: +* Erase a Flash sector. +* +* INPUT: +* secNum - sector Number.